Principal Physical Verification Engineer
Celero CommunicationsJob Title
Principal Physical Verification Engineer
Role Summary
Join the Physical Design team to own full-chip physical verification (PV) execution on advanced TSMC process nodes. The role ensures design quality, manufacturability, and tapeout readiness for complex digital blocks and full-chip implementations.
Experience Level
Senior - 7+ years of full-chip physical verification experience.
Responsibilities
Lead and execute full-chip physical verification activities, coordinate across design teams, and drive tapeout readiness.
- Lead full-chip PV effort and own execution plans and schedules for tapeout.
- Run and analyze DRC, LVS/ERC, LUP/PERC and other PV checks at block and chip level.
- Develop and maintain flows for block- and chip-level verification.
- Work with analog IP teams to ensure clean IP delivery and integration.
- Provide early guidance on corner cases, floorplan constraints, hierarchy, and implementation strategy.
- Participate in and present PV status for tapeout readiness reviews; drive accountability for quality and milestones.
Requirements
Must-have skills and experience for immediate contribution; preferred items listed after.
- Must-have: 7+ years of experience with full-chip verifications and completed tapeouts.
- Must-have: Hands-on experience with physical verification tools (ICV or Calibre) and running/analyzing PV results.
- Must-have: Ability to assemble and operate PV flows that support block and chip-level verification.
- Must-have: Strong floorplanning knowledge to avoid DRC/LVS issues and guide integration of analog IP.
- Nice-to-have: Experience in advanced process nodes (7nm, 5nm, 3nm).
- Nice-to-have: Automation/scripting skills (Tcl, Python, shell) to improve flow efficiency.
Education Requirements
Bachelor's or Master's degree in Electrical Engineering or a related field (specified as required in the posting).
About the Company
Company: Celero Communications
Headquarters: Ottawa, Ontario, Canada
Designs and develops optical transceivers and ASIC solutions for next-generation optical modems, focusing on digital ASIC/RTL design, verification, and optical communication technologies.
