Principal Physical Verification Engineer

Job Title

Principal Physical Verification Engineer

Role Summary

Ownership of block-level and full-chip physical verification (PV) signoff to ensure designs meet foundry and reliability requirements. Work within the VLSI design team and coordinate with physical design, PDK, CAD, and tapeout teams to deliver silicon-ready databases.

Experience Level

Senior-level. Specific years of experience not stated.

Responsibilities

Deliver PV signoff and drive closure across full-chip and block scopes.

• Perform DRC, LVS, ERC, antenna, density, and reliability checks for block and full-chip designs.
• Drive signoff closure by identifying, debugging, and resolving PV violations.
• Collaborate with physical design and layout teams to fix violations and correlate issues to PD root causes.
• Develop and maintain runsets, decks, and automation flows using industry-standard EDA tools.
• Analyze foundry decks and PDK updates for compliance with process requirements.
• Lead tapeout readiness reviews and ensure high-quality database delivery.
• Manage hierarchical verification and regression runs; optimize runtime and capacity.
• Interface with foundry and EDA vendors to resolve tool or deck-related issues.
• Mentor and review work of junior engineers.

Requirements

Key must-have skills and preferred additions.

• Must-have: Proven experience in PV signoff (DRC/LVS/ERC/antenna/density/reliability) for block and full-chip designs.
• Experience developing and maintaining PV runsets, decks, and automation using industry EDA tools.
• Practical knowledge of foundry deck/PDK compliance and signoff processes; experience in tapeout readiness and database delivery.
• Ability to debug PV violations and correlate them with physical design causes; experience with hierarchical verification and regression management.
• Strong analytical, problem-solving, and cross-functional communication skills; ownership mindset and ability to mentor junior engineers.
• Nice-to-have: Exposure to physical design concepts (floorplanning, PDN, placement/CTS/routing), EM/IR/latch-up/ESD checks, multi-patterning/EUV constraints, SoC integration challenges, and flow automation/methodology development.

Education Requirements

Not specified.

About the Company

Company: NXP Semiconductors

Headquarters: Nijmegen, Netherlands

NXP Semiconductors N.V. is a global semiconductor company that provides High Performance Mixed Signal and Standard Product solutions. With over 45,000 employees and operations in more than 35 countries, NXP is a leader in secure connectivity solutions for embedded applications, catering to automotive, industrial IoT, mobile, and communication infrastructure markets. The company is committed to innovation and sustainability, advancing a smarter, safer, and more sustainable world through technology.