Principal Physical Design Engineer

Job Title

Principal Physical Design Engineer

Role Summary

Lead physical design implementation for next-generation high-performance networking, AI/ML accelerator, and custom cloud ASICs within Broadcom's ASIC Products Division (APD) Physical Design team.

Drive block- and top-level floorplanning, synthesis, place-and-route, clock-tree synthesis, timing and power closure, and signoff on advanced foundry nodes.

Experience Level

Senior level - requires significant hands-on experience; posting specifies 12+ years of physical design experience.

Responsibilities

Deliver and own complex physical implementation tasks from floorplan through signoff.

• Lead block-level and full-chip implementation using Cadence Innovus and associated flows.
• Perform floorplanning, placement, CTS, routing, and timing/power optimization for advanced nodes (N7/N5/N3/N2).
• Execute multi-corner multi-mode (MCMM) STA and signal-integrity work for timing closure and signoff.
• Perform power integrity analysis and mitigation (static/dynamic IR-drop, EM) for signoff using tools such as Voltus or RedHawk.
• Use extraction tools (StarRC/QRC) and DRC/LVS flows (Siemens Calibre) to support closure.
• Develop and maintain automation to improve turn-around-time and signoff quality.
• Provide technical leadership, coordinate cross-functional teams, and mentor junior engineers.

Requirements

Must-have technical skills and experience.

• 12+ years of hands-on physical design experience with tapeouts of complex, high-frequency, large-scale ASICs.
• Direct experience executing tapeouts on advanced foundry processes (TSMC N7, N5, N3, or equivalent).
• Proficiency with major physical design tool flows: Cadence Innovus; Synopsys PrimeTime or Cadence Tempus; StarRC / QRC; RedHawk; Siemens Calibre.
• Advanced scripting for flow automation (TCL, Python, Unix shell).
• Strong expertise in timing and power closure, signal integrity, and power-grid optimization.
• Excellent technical leadership, problem-solving, and cross-functional communication skills.
• Nice-to-have: experience with high-speed clock network implementation and power-aware implementation flows (UPF/CPF, multi-voltage domains, clock/power gating).

Education Requirements

Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related technical field.

About the Company

Company: Broadcom

Headquarters: Irvine, California, United States

Broadcom is a global technology leader that designs, develops, and supplies a wide range of semiconductor and infrastructure software solutions. The company is known for its innovations in wireless and broadband communications, enabling a connected world.