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Principal Physical Design Engineer

Synopsys
November 2, 2026
Full-time
On-site
Seongnam-si, Gyeonggi-do, South Korea
Physical Design Jobs, Level - Senior

Job Title

Principal Physical Design Engineer

Role Summary

Lead physical design methodology and implementation engagements for advanced-node semiconductor customers, focusing on RTL-to-GDSII flows, automation, and measurable improvements in PPA and design closure. Collaborate with product engineering, R&D, foundries, and customers to translate implementation challenges into production-ready methodologies.

Experience Level

Senior - requires 15+ years of hands-on experience in semiconductor physical design, implementation methodologies, or EDA development.

Responsibilities

Primary responsibilities include leading customer engagements, developing methodologies, and building automation to accelerate tapeouts.

  • Lead physical design engagements from floorplanning through signoff for advanced-node designs.
  • Develop and optimize RTL-to-GDSII methodologies to improve power, performance, area (PPA), reduce runtime, and accelerate design closure.
  • Build automation frameworks using Python and Tcl for placement, CTS, routing, and timing-closure workflows.
  • Collaborate with Product Engineering, global R&D, and foundries to validate technologies and translate customer feedback into product requirements.
  • Drive technical evaluations, benchmarking programs, and advanced-node enablement initiatives.
  • Mentor and provide technical leadership to engineers in the Korea team.

Requirements

Must-have technical skills and demonstrated customer-facing experience.

  • Deep hands-on expertise across the RTL-to-GDSII flow: floorplanning, placement optimization, clock tree synthesis, routing, timing closure, power optimization, and physical verification.
  • Strong proficiency in Python and Tcl for building automation and productivity tools.
  • Proven experience working directly with semiconductor customers to solve implementation challenges and deploy methodologies for production tapeouts.
  • Fluency in Korean and English; able to lead technical discussions and present to executive stakeholders in both languages.
  • Experience with Fusion Compiler, IC Compiler II, PrimeTime, or equivalent implementation and signoff tools is a plus.

Education Requirements

BS, MS, or PhD in Electrical Engineering, Computer Engineering, Computer Science, or a related field.


About the Company

Company: Synopsys

Headquarters: Mountain View, California, USA

Synopsys is a leading company in electronic design automation (EDA) and semiconductor IP solutions. It provides tools and services for designing and verifying complex semiconductor devices and systems. The company plays a pivotal role in the semiconductor industry, helping engineers innovate and deliver higher-quality products faster. Synopsys is committed to advancing technology standards and offers a range of software and hardware solutions to its clients globally.

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Date Posted: 2026-11-02