Principal Physical Design Engineer

Job Title

Principal Physical Design Engineer

Role Summary

Lead the physical implementation of critical SoC blocks for a high-performance AI accelerator, owning the flow from floorplanning through tapeout signoff.

Work on a small, cross-functional engineering team interfacing with architects, RTL designers, verification, EDA vendors, and foundries to deliver production silicon and enable future product generations.

Experience Level

Senior — typically 8+ years of physical-design experience at advanced process nodes (7nm or below).

Responsibilities

Primary responsibilities include end-to-end physical implementation and cross-team collaboration.

• Own physical design flow for one or more major SoC blocks: floorplanning, P&R, CTS, timing closure, and signoff.
• Drive timing closure, power optimization, and physical verification to meet performance and area targets.
• Develop and apply AI-assisted or automated implementation methodologies to increase productivity and shorten tapeout schedules.
• Collaborate with architects, RTL, verification, software teams, EDA vendors, and foundry partners to resolve implementation and manufacturability issues.
• Participate in signoff activities and ensure production-ready silicon delivery.

Requirements

Must-have technical skills and experience; bonuses list additional beneficial expertise.

• 8+ years of hands-on physical design experience for complex, high-performance ASICs at advanced nodes (7nm or below).
• Deep knowledge of the full implementation flow: synthesis, place & route, CTS, timing closure, physical verification, and signoff.
• Practical experience with leading implementation tools such as Cadence Innovus or Synopsys Fusion Compiler (or comparable platforms).
• Experience with industry-standard signoff tools (PrimeTime, Tempus, or equivalent).
• Proven record working cross-functionally with architects, RTL engineers, EDA vendors, and foundries to deliver complex designs.
• Strong problem-solving and communication skills for technical coordination and vendor/foundry interactions.
• Nice-to-have: experience with advanced packaging (2.5D/3D, CoWoS), IR/EM analysis, thermal optimization, signal integrity, or DFT-aware implementation.

Education Requirements

Not specified.

About the Company

Company: Acceler8

A talent acquisition and recruiting agency specializing in sourcing engineering and technology candidates for startups and high-growth companies, particularly across hardware and AI infrastructure roles.