Principal Mixed Signal Design Engineer

Job Title

Principal Mixed Signal Design Engineer

Role Summary

Lead mixed-signal architecture and design for HBM and DRAM subsystems, owning high-speed I/O, clocking, analog front-end, and power/regulation. Deliver scalable, high-performance interfaces through architecture definition, pre/post-silicon validation, and cross-functional collaboration.

Experience Level

Senior (Principal) engineering role. Senior-level technical ownership and leadership; specific years of experience not stated.

Responsibilities

Primary responsibilities include:

• Define and own mixed-signal architecture for HBM and DRAM subsystems: high-speed I/O/PHY, clocking/PLL/DLL, timing distribution, analog front-end (TX/RX, equalization, termination), and voltage regulation/reference generation.
• Drive architectural tradeoffs across performance, bandwidth, latency, power, area, reliability, and scalability.
• Ensure robust reset/power-up behavior, corner-case handling, and maintain clean ECO pathways.
• Lead design of advanced mixed-signal and analog circuits: high-speed serializers/deserializers and drivers, sense amplifiers, data sampling, clock/data recovery, training circuits, and power management/on-die regulation.
• Lead pre-silicon validation strategy, review modeling assumptions, and guide verification for AMS, behavioral, and silicon correlation.
• Drive post-silicon bring-up, characterization, and debug; ensure designs meet HBM/DRAM specifications, reliability, EM/IR, noise, and variation tolerance.
• Partner with digital design, physical/layout, packaging, SI/PI, and process technology teams to ensure integration and compliance.
• Mentor senior and staff engineers and establish design methodologies, modeling standards, and best practices.
• Apply AI/ML-assisted design methods and data-driven automation to improve simulation efficiency, failure triage, debug, and optimization workflows.

Requirements

Essential skills and experience expected for the role:

• Extensive mixed-signal and analog design experience for high-speed memory interfaces (HBM/DRAM) and PHY circuits.
• Deep knowledge of clocking (PLL/DLL), timing distribution, signal integrity, and power/IR/EM considerations.
• Proven pre-silicon validation and post-silicon bring-up/characterization experience.
• Track record of technical leadership, cross-functional collaboration, and mentoring senior engineers.
• Experience ensuring designs meet specification, reliability, aging, noise tolerance, and compliance targets.
• Familiarity with AI/ML-assisted tools and data-driven automation for design and verification is desirable.

Education Requirements

Not specified.

About the Company

Company: Micron Technology

Headquarters: Boise, Idaho, USA

Micron Technology is a global leader in memory and storage solutions, dedicated to transforming how the world uses information. The company offers a diverse portfolio of high-performance DRAM, NAND, and NOR memory products under the Micron and Crucial brands. With a commitment to customer focus and technological innovation, Micron drives advancements in artificial intelligence, 5G, and other data-centric applications, empowering users to learn, communicate, and progress.