Principal Layout Engineer - DPG LPDDR

Job Title

Principal Layout Engineer - DPG LPDDR

Role Summary

Lead physical layout activities for advanced memory and mixed-signal products, owning full-chip floorplanning, integration, implementation, and tape-out execution. Collaborate with cross-functional and global teams to deliver manufacturable, signoff-quality designs at advanced nodes.

Experience Level

Senior level — requires extensive senior engineering experience. The posting requests 15+ years of hands-on custom layout experience.

Responsibilities

Primary duties include technical leadership of physical design and layout execution across the full chip life cycle.

• Lead full-chip floor planning, integration, physical implementation, signoff, and tape-out execution.
• Drive layout implementation for complex analog, mixed-signal, memory, and high-speed interface blocks.
• Own physical verification and reliability closure: DRC, LVS, ERC, EMIR, and manufacturability.
• Define and scale layout methodologies, best practices, and execution frameworks.
• Drive automation using AI/ML and agentic AI to improve layout productivity, quality, and decision-making.
• Lead and mentor cross-functional and global engineering teams; promote technical excellence.

Requirements

Must-have technical skills and experience; nice-to-have items listed separately.

• Must-have: 15+ years of hands-on custom layout experience and proven success leading full-chip programs from concept through silicon tape-out.
• Must-have: Deep expertise in Analog & Mixed-Signal layout, Memory & High-Speed Interface layout, full-chip floorplanning & integration, signal/power integrity, EM/IR, and physical verification & signoff at advanced nodes (FinFET/GAA).
• Must-have: Strong proficiency with Cadence Virtuoso, Calibre, StarRC, Totem, and similar EDA tools.
• Must-have: Strong automation skills: Python, SKILL, Tcl and experience building automation/engineering workflows.
• Must-have: Proven experience applying AI/Generative AI/Agentic AI to enhance engineering productivity and design automation.
• Nice-to-have: Experience with LPDDR, HBM, NAND, SERDES, PCIe, UCIe, or advanced SoC products.
• Nice-to-have: Experience deploying AI-powered engineering workflows and intelligent design agents.
• Other: Excellent technical leadership, communication, and problem-solving skills.

Education Requirements

B. Tech or M. Tech in Electrical Engineering, Electronics, VLSI, or a related technical field.

About the Company

Company: Micron Technology

Headquarters: Boise, Idaho, USA

Micron Technology is a global leader in memory and storage solutions, dedicated to transforming how the world uses information. The company offers a diverse portfolio of high-performance DRAM, NAND, and NOR memory products under the Micron and Crucial brands. With a commitment to customer focus and technological innovation, Micron drives advancements in artificial intelligence, 5G, and other data-centric applications, empowering users to learn, communicate, and progress.