Principal FPGA Engineer

Job Title

Principal FPGA Engineer

Role Summary

Lead FPGA design and verification efforts for defense-related products within the Multi-Product Power & Digital (MPD) organization. Work spans architecture, FPGA implementation, lab integration, verification, production support, and technical leadership for systems such as missiles, radars, and electronic warfare.

This is an onsite position based in McKinney, TX, responsible for delivering production-quality FPGA solutions and leading small to medium engineering teams.

Experience Level

Senior — Principal-level role. The posting indicates a minimum of approximately 8 years of relevant experience.

Responsibilities

Accountabilities include full lifecycle FPGA development, technical leadership, and cross-discipline coordination.

• Design and implement production-quality FPGA firmware for major vendors and device families (AMD/Xilinx, Intel/Altera, Microchip/Microsemi).
• Develop FPGA solutions for MGT serial interfaces, RF DSP, controls, data links, embedded processing, and processor interfaces.
• Translate system-level requirements into FPGA requirements and architectures; select parts and define interfaces and CONOPS.
• Code in VHDL and/or Verilog for reliability and maintainability; participate in code reviews and source control processes.
• Verify designs using directed and constrained-random techniques; track functional and code coverage.
• Perform timing closure, clock-domain-crossing and reset-domain analyses; develop synthesis/place-and-route constraints.
• Integrate and debug FPGA/ASIC hardware in the lab; support bring-up and system integration.
• Define schedules, manage task execution, and report on budget/schedule and technical risks.
• Create and maintain design documentation, verification plans, and user guides; lead technical reviews.
• Coach and mentor junior engineers; lead small to medium-sized teams and support customer interactions.

Requirements

Must-have technical skills, security, and experience for immediate contribution in an avionics/defense environment.

• Minimum ~8 years of relevant FPGA/ASIC design or verification experience.
• Hands-on experience with FPGA vendors and tools (AMD Vivado, Intel/Altera Quartus Prime Pro, Microchip Libero) and multiple device families.
• Proficient in VHDL and/or Verilog; familiarity with SystemVerilog for verification is acceptable.
• Experience with lab integration, hardware debug, and bring-up of FPGA/ASIC designs.
• Knowledge of timing closure, CDC/clock-domain crossing, reset-domain handling, and constraint development.
• Experience with source code management, design reviews, and team-driven code release practices.
• Demonstrated ability to lead engineering tasks and coordinate small teams to meet schedule and technical requirements.
• U.S. citizenship is required; ability to obtain and maintain a U.S. government security clearance. Active DoD Secret clearance required at day 1.
• Location: onsite in McKinney, TX.

Education Requirements

Typically requires a Bachelor’s degree in a STEM field (Electrical Engineering, Computer Engineering, Computer Science, Physics, Mathematics or related technical field). Advanced degrees (Master's or PhD) in Electrical Engineering or related STEM fields are valued and may count toward experience (the posting notes a suitable degree may be counted as two years of work experience). Equivalent practical experience may be considered where stated.

Preferred / Nice-to-have

Additional skills and domain experience that strengthen candidacy.

• Advanced degree in EE or related STEM field.
• Experience with radar or image processing, embedded processors (ARM, MicroBlaze, NIOS), and gigabit/multi-gigabit transceivers.
• Constrained-random verification (UVM/SystemVerilog), emulation platforms (e.g., Veloce), and high-level synthesis (HLS).
• Experience with vector processors, GPUs, or AI/ML inference on FPGAs (Vitis AI, FINN, custom accelerators).
• Experience applying AI to verification workflows (automation, regression analytics, log triage).
• Program leadership, earned-value or Agile execution experience, proposal development, IP generation (patents/publications), and demonstrated mentorship.

Compensation & Other Information

The published salary range is 107,500 USD to 204,500 USD per year. Relocation may be available based on eligibility. The role is U.S.-based; U.S. pay structure and benefits apply where relevant.

Security clearance information: see U.S. Department of State information on security clearances: Security Clearances - state.gov

About the Company

Company: Raytheon Technologies

Headquarters: Arlington, VA, USA

Raytheon Technologies is an Aerospace and Defense company offering advanced systems and services for commercial, military, and government customers worldwide. Formed in 2020 from the merger of Raytheon Company and United Technologies Corporation, it operates through three major business units: Collins Aerospace Systems, Pratt & Whitney, and Raytheon. The company specializes in delivering cutting-edge solutions across various fields including quantum physics, hypersonics, and cybersecurity.