Principal FPGA Engineer

Job Title

Principal FPGA Engineer

Role Summary

Lead design, architecture, implementation, verification, and production support of FPGA-based systems for sensor and effector products within the Multi-Product Power & Digital (MPD) department. Work with multidisciplinary teams to translate system requirements into FPGA architectures, deliver production-quality designs, and support integration and sustainment.

Experience Level

Senior — typically requires a minimum of 8 years of relevant FPGA/ASIC engineering experience.

Responsibilities

Deliver end-to-end FPGA solutions and lead engineering efforts across design, verification, and integration.

• Provide full lifecycle FPGA design for AMD (Xilinx), Altera, and Microchip devices using tools such as Vivado, Quartus, or Libero.
• Design for applications including gigabit/multigigabit transceivers (MGT), RF DSP, controls, data links, and embedded processor interfaces.
• Translate system-level requirements into FPGA requirements and architectures; select parts and define interfaces and CONOPS.
• Lead and mentor small to medium engineering teams; review and delegate work, run technical reviews.
• Develop and execute verification plans using directed and constrained-random techniques; track functional and code coverage.
• Perform lab integration and debug of FPGA/ASIC hardware and firmware.
• Manage schedules, risks, and project execution to budget and timeline.
• Create and maintain technical documentation: requirements, verification plans, and user guides.
• Support customer interactions and contribute to product and technology roadmaps.

Requirements

Must-have technical qualifications and security/eligibility requirements.

• U.S. citizenship and an active DoD Secret clearance required; ability to maintain security clearance.
• 8+ years of FPGA/ASIC design or verification experience (VHDL, Verilog, and/or SystemVerilog).
• Hands-on experience with AMD (Xilinx), Intel/Altera, and/or Microchip device families and associated toolchains (Vivado, Quartus, Libero).
• Experience with timing closure, clock-domain crossing and reset-domain analysis, and constraint development.
• Experience integrating and debugging FPGA/ASIC hardware in a lab environment.
• Familiarity with source code management, design reviews, and team-based code release practices.
• Proven ability to lead technical teams and drive tasks to completion on schedule.

Education Requirements

Typically requires a bachelor’s degree in a STEM field (Science, Technology, Engineering, or Mathematics). Advanced degrees in Electrical Engineering or related STEM fields are preferred and may be counted toward experience (e.g., an advanced degree may be counted as up to two years of experience).

About the Company

Company: Raytheon Technologies

Headquarters: Arlington, VA, USA

Raytheon Technologies is an Aerospace and Defense company offering advanced systems and services for commercial, military, and government customers worldwide. Formed in 2020 from the merger of Raytheon Company and United Technologies Corporation, it operates through three major business units: Collins Aerospace Systems, Pratt & Whitney, and Raytheon. The company specializes in delivering cutting-edge solutions across various fields including quantum physics, hypersonics, and cybersecurity.