Principal FPGA Engineer

Job Title

Principal FPGA Engineer

Role Summary

Lead architecture, implementation, and verification of advanced FPGA solutions for space-based electronic systems supporting DoD, Intelligence Community, and civil space customers. Work on high-speed, radiation-mitigated designs using AMD/Xilinx devices to meet demanding performance, timing, and reliability requirements.

Collaborate with hardware and software engineers in a multi-discipline team to deliver mission-critical FPGA functionality for RF, processing, networking, and data storage applications.

Experience Level

Senior — typically requires 9+ years of related FPGA engineering experience (see Education Requirements for degree-related equivalencies).

Responsibilities

Principal duties include full lifecycle FPGA design, verification, and integration for high-performance space systems.

• Architect, implement, and verify complex FPGA designs for multi-function RF, processing, networking, and storage systems.
• Develop complete FPGA designs using VHDL and Vivado IP Integrator with emphasis on efficient datapaths and timing closure.
• Code, simulate, and verify RTL modules (DSP, control, peripheral interfaces) and create comprehensive testbenches.
• Design and integrate embedded ARM processors, DDR4 memory, and high-speed serial interfaces (Aurora, JESD204B/C, PCIe, 1G/10G/100G Ethernet).
• Create and maintain timing constraints and ensure post-implementation timing results meet requirements.
• Document IP-level and top-level designs; participate in code and design reviews and contribute to FPGA design methodologies.
• Support board bring-up and lab verification; use FPGA debugging tools during integration.
• Mentor junior engineers and provide training and guidance as needed; support travel or off-site work when required.

Requirements

Core technical requirements (must-haves) and desirable additional skills.

• 9+ years of related FPGA engineering experience or equivalent industry experience.
• Thorough understanding of FPGA design flow: synthesis, static timing analysis, place & route, timing closure techniques, and power analysis.
• Hands-on experience with Xilinx SoC/FPGA devices using the Vivado Design Suite and Vivado IP Integrator.
• RTL design and coding using VHDL; simulation and verification using SystemVerilog testbenches.
• Experience with embedded ARM processors, DDR4 memory, and high-speed serial protocols (Aurora, JESD204B/C, PCIe, Ethernet).
• Ability to create and maintain timing constraints and design documentation; perform code and design reviews.
• Experience with board bring-up, lab verification, and FPGA debugging tools (Vivado HW Debugger, ILA, Chipscope, SmartDebug).
• Effective collaboration across hardware and software teams and experience mentoring junior engineers.

Nice-to-have:

• Experience with Versal AI Engines and Microsemi/Microchip FPGAs (Libero).
• Familiarity with revision control (Git), ModelSim/Questa/Aldec simulation tools, and simulation libraries (UVVM, UVM).
• Experience with lab test equipment (logic analyzers, oscilloscopes, signal generators, spectrum analyzers), DSP and compression algorithms, MATLAB/Simulink, Linux, and C/C++.

Education Requirements

Posting specifies a Bachelor’s degree in Computer Engineering, Electrical Engineering, or a related technical field. The position indicates experience equivalency: 9+ years of related experience with a bachelor’s degree, or 7+ years of related experience with a master’s degree. No specific certifications were listed.

About the Company

Company: Trident Systems

Developer of space and defense electronic systems specializing in radiation-mitigated FPGA designs, software-defined radios, on-board processors and storage; mission partner to DoD, the Intelligence Community, and civil space customers.