Principal FPGA Engineer

Job Title

Principal FPGA Engineer

Role Summary

Lead development and delivery of FPGA designs across major vendors (AMD/Xilinx, Altera, Microchip) for applications including gigabit serial interfaces, RF/EO DSP, controls, data links, embedded processing, and processor interfaces. Work within the Effector Subsystems Products (ESP) organization to take FPGA designs from requirements and architecture through verification, production release, and configuration management.

Experience Level

Senior-level. The role typically requires a minimum of 8 years of relevant FPGA engineering experience and experience leading technical efforts or teams on moderate to large multi-year programs.

Responsibilities

Accountable for architecture, design, implementation, verification, and documentation of FPGA-based systems.

• Design and deliver production-quality FPGA releases from proof-of-concept to production.
• Lead FPGA systems architecture, part selection, and interface definitions.
• Implement RTL (VHDL) with emphasis on reliability, maintainability, and reuse.
• Develop verification using directed and constrained-random tests; track functional and code coverage.
• Perform timing constraint definition and timing closure activities.
• Integrate and debug hardware using oscilloscopes, logic analyzers, and similar tools.
• Translate system-level requirements into FPGA requirements and IP partitioning.
• Create and maintain requirements, verification plans, user guides, and configuration management artifacts.
• Participate in and lead internal and external technical reviews; drive projects to schedule and budget.
• May lead integrated or cross-product teams and establish project processes and operational plans.

Requirements

Must-have technical skills, security eligibility, and practical FPGA experience.

• U.S. citizenship and ability to obtain/maintain a U.S. government security clearance (DoD Secret). Active clearance required on day 1.
• Extensive experience architecting FPGA-based systems and determining parts and interfaces.
• Minimum of ~8 years of experience covering most of the following areas: digital design and HDL coding for configurable logic devices; delivering FPGA solutions to system-level applications; work with one or more FPGA vendors (Altera, Lattice, Microchip, AMD) and toolchains.
• Experience with FPGA timing constraints, timing closure, and digital simulation tools (e.g., Questa, RivieraPro).
• Experience with industry-standard interfaces and protocols (AXI, PCIe, SPI, I2C) and integration/debug with lab instruments.
• Experience working with IP cores and with Python or C for test or tooling.
• Proven ability to drive projects independently and collaborate with systems, hardware, software engineers, and program management.

Preferred / nice-to-have skills:

• Radar or image processing (visual/infrared) experience; gigabit serial/MGT experience.
• Experience with embedded processors/SoC on FPGAs (ARM, MicroBlaze, Nios) and Linux-based FPGA development.
• Familiarity with git/GitHub, encryption standards (AES, RSA, ECC), hardware-based verification platforms, and proposal/PM tasks.
• Leadership experience (team lead, technical lead) and prior proposal or basis-of-estimate work.

Education Requirements

Typically requires a Bachelor’s degree in a STEM field (science, technology, engineering, or mathematics) plus a minimum of 8 years relevant experience. A Master’s or Ph.D. in Electrical or Computer Engineering is listed as preferred.

About the Company

Company: Raytheon

Headquarters: Waltham, MA, USA

Global defense and aerospace company providing advanced systems and services for government and commercial customers, including weapon systems, sensors, and electronic subsystems. Known for engineering and integration of mission-critical technologies for air, land, sea, space, and cyber domains.