Principal Firmware/Middleware Engineer

Job Title

Principal Firmware/Middleware Engineer

Role Summary

As Principal Firmware Architect for UALink Switch Products, you will define and drive the embedded firmware and middleware architecture for next-generation AI cluster scale-up switches. You will bridge ASIC design and system orchestration, owning firmware for link bring-up, topology management, performance, RAS, and security across large fabrics.

Experience Level

Senior — typically requires 15+ years of hands-on experience in embedded systems, server platform architecture, or low-level silicon firmware development.

Responsibilities

Lead architecture, design, and delivery of low-level firmware and platform interfaces for UALink switch ASICs.

• Architect low-level firmware for internal microcontrollers and specify hardware-software interfaces, registers, scratchpads, and memory maps.
• Collaborate with ASIC, RTL, and verification teams on hardware-software co-design.
• Define and implement the firmware stack for physical, link, and transport layers, including credit management, routing tables, and flow control.
• Design deterministic link-initialization and fast link-training state machines for die-to-die and chassis-to-chassis connections.
• Architect runtime topology discovery, dynamic routing, and credit-management algorithms to avoid fabric congestion.
• Lead SDK and API design exposing switch functionality to BMCs (OpenBMC/Redfish).
• Optimize bare-metal execution paths for deterministic low latency and high bandwidth (collective communication primitives).
• Design telemetry, robust error-handling, fault isolation, and other RAS mechanisms (e.g., link fallback, FEC).
• Implement secure boot, cryptographic firmware authentication, and runtime attestation to establish root-of-trust.

Requirements

Must-have technical skills and experience (degree information summarized separately below).

• Expert C development for bare-metal and RTOS environments (ThreadX, FreeRTOS, Zephyr).
• Proficient Python for hardware automation and modeling.
• Deep understanding of high-speed interconnects (UALink, NVLink, CXL, PCIe Gen5/Gen6) and network switching concepts: credit-based flow control, packet routing, PHY equalization, SerDes management.
• Experience with hardware debuggers (JTAG, Lauterbach/TRACE32) and lab equipment (oscilloscopes, PCIe/protocol analyzers).
• Proven experience designing secure boot and firmware authentication mechanisms.
• Strong system-level performance optimization skills and experience delivering production firmware for complex hardware platforms.
• Ability to work cross-functionally with ASIC, RTL, verification, and system software teams.

Education Requirements

Bachelor's, Master's or Ph.D. in Computer Engineering, Electrical Engineering, Computer Science, or a related discipline.

About the Company

Company: Renesas

Headquarters: Hitachinaka, Japan

Renesas is a global leader in embedded semiconductor solutions, providing high-quality products across automotive, industrial, infrastructure, and IoT sectors. With over 22,000 employees in more than 30 countries, the company focuses on scalable solutions that enhance user experience and drive innovation while committed to sustainability and energy efficiency.