Principal Engineer, Subsystem CoE Emulation

Job Title

Principal Engineer, Subsystem CoE Emulation

Role Summary

Lead development and delivery of subsystem and full-chip emulation environments for SoCs in the Custom Compute and Storage business unit. The role focuses on emulation bring-up, pre‑silicon validation, debug across hardware/software boundaries, and enabling firmware and software readiness.

Collaborate with RTL design, verification, firmware and software teams to integrate models, define requirements and test plans, and drive emulation strategy for boot, security, high‑speed interfaces, memory, and peripherals.

Experience Level

Senior. See Education Requirements for specific experience ranges associated with degree level.

Responsibilities

Primary responsibilities include establishing and operating SoC emulation environments and supporting system-level validation:

• Develop and integrate emulation models; manage environment setup, compilation, and debug on platforms such as Veloce, ZeBu, and Palladium.
• Lead emulation bring-up activities including clock/reset sequencing, firmware boot, and system validation.
• Create and execute emulation test plans to support verification, performance analysis, and software development.
• Debug complex issues across RTL, firmware, emulation platforms, and toolchains.
• Optimize emulation performance via model partitioning, timing tuning, and runtime efficiency improvements.
• Automate flows and build scripting/tools to improve productivity and repeatability.
• Collaborate with cross-functional teams to ensure accurate hardware models and seamless integration.
• Interface with EDA vendors to evaluate tools, resolve technical issues, and drive improvements.

Requirements

Must-have technical skills and capabilities:

• Proven SoC emulation, validation, and debug experience across multiple subsystems.
• Domain expertise in one or more: boot/system initialization, security architecture, PCIe/CXL/Ethernet, DDR/HBM, USB, SPI/I2C/UART.
• Hands-on experience with emulation platforms (Palladium, ZeBu, Veloce).
• Strong debugging skills across the hardware/software boundary and familiarity with related toolchains.
• Proficiency in scripting (Python, Perl, Tcl, shell) to automate and improve flows.
• Proven ability to lead cross-functional efforts and deliver on emulation programs.
• Experience working with EDA vendors (Synopsys, Cadence, Siemens) to assess and resolve issues.
• Eligibility to access export-controlled technology; non-U.S. applicants may be subject to export license review.

Education Requirements

Bachelor’s degree in Computer Science, Electrical Engineering, or a related technical field with approximately 10–15 years of related professional experience; or a Master’s degree or PhD in Computer Science, Electrical Engineering, or related field with approximately 5–10 years of related experience. Fields explicitly mentioned: Computer Science and Electrical Engineering.

About the Company

Company: Marvell Technology

Headquarters: Santa Clara, California, United States

Marvell’s semiconductor solutions serve as essential building blocks of the data infrastructure connecting our world, driving innovation across enterprise, cloud, AI, and carrier architectures. The company focuses on creating transformative technology that shapes the future.