Principal Engineer, SRAM Design

Job Title

Principal Engineer, SRAM Design

Role Summary

Design and deliver high-performance SRAM memory IP and testchip content for advanced semiconductor process nodes. Work across circuit design, simulation, verification, layout, process integration and silicon characterization to produce production-ready memory solutions.

Work closely with layout, CAD, process/foundry, testchip and partner teams; mentor junior engineers and improve design flows and automation.

Experience Level

Level: Senior (Principal). Typical background: 8+ years of industry experience in SRAM, register-file, ROM, DRAM-peripheral or custom-memory circuit design.

Responsibilities

The engineer is responsible for transistor-level design, simulation signoff, testchip planning, cross-team integration and documentation.

• Design, develop and verify memory-array subsystems: bitcells, precharge/equalization, sense amps, write drivers, decoders, wordline drivers and control logic.
• Evaluate bitcell and peripheral stability, performance, leakage, dynamic power and area across PVT, mismatch and aging.
• Perform transistor-level simulation and signoff (Spectre/FineSim or equivalent): PVT corners, Monte Carlo, parasitic-aware post-layout simulation and waveform/debug reviews.
• Collaborate with layout on floorplanning, matching, critical routing, clock/control distribution and parasitic reduction.
• Plan and support SRAM testchips: instance selection, PPA objectives, test access, measurement structures and characterization plans.
• Engage foundry/process partners to address device behavior, variation, layout restrictions and reliability constraints.
• Create circuit specifications, design-review material, verification plans and release documentation with traceable assumptions and results.
• Mentor engineers on memory-circuit fundamentals, simulation discipline, PPA analysis and debug methods.
• Improve/automate simulation setup, regression, results extraction and validation using scripting and engineering tools; explore AI-assisted workflows while maintaining human technical review.

Requirements

Must-have technical skills and experience for immediate contribution; preferred items listed separately.

• Minimum 8 years industry experience in SRAM, register-file, ROM, DRAM-peripheral or custom-memory circuit design.
• Strong CMOS transistor-level circuit design skills and memory architecture knowledge (static/dynamic timing, power analysis, signal integrity, variation).
• Hands-on experience with Cadence Virtuoso and SPICE-class simulators (HSPICE, Spectre, FineSim) and transistor-level signoff practices.
• Experience with PVT-corner analysis, Monte Carlo mismatch studies and parasitic-aware post-layout simulation.
• Proven ability to translate product/testchip requirements into circuit architecture, measurable targets and verification/release criteria.
• Experience collaborating with layout, CAD, process/foundry, verification and silicon characterization teams; clear technical communication and structured problem solving.
• Ability to debug complex circuit and silicon issues using data and waveform evidence.
• Nice-to-have: experience with memory/register-file compilers, low-power techniques, RTL-to-GDS methodologies, and scripting for automation (Python, Tcl, Perl, SKILL).
• Nice-to-have: experience planning and executing memory testchips and correlating silicon measurements to models.

Education Requirements

BS, MS or PhD in Electrical Engineering, Electronics, VLSI, Microelectronics, Computer Engineering or a related technical field.

About the Company

Company: Micron Technology

Headquarters: Boise, Idaho, USA

Micron Technology is a global leader in memory and storage solutions, dedicated to transforming how the world uses information. The company offers a diverse portfolio of high-performance DRAM, NAND, and NOR memory products under the Micron and Crucial brands. With a commitment to customer focus and technological innovation, Micron drives advancements in artificial intelligence, 5G, and other data-centric applications, empowering users to learn, communicate, and progress.