Principal Engineer, SoC Design
Samsung SemiconductorJob Title
Principal Engineer, SoC Design
Role Summary
The Principal Engineer will lead SoC-level microarchitecture, top integration and RTL implementation for memory and storage controller subsystems within the DRAM Development Lab (DDL). The role works with architects, verification, physical-design teams and third-party IP providers to deliver prototype and production controllers that enhance memory and storage capabilities.
Experience Level
Senior (Principal). Posting specifies large seniority: PhD-level candidates ~15+ years, Master’s ~18+ years, Bachelor’s ~20+ years of industry experience.
Responsibilities
Primary responsibilities include SoC architecture, integration, implementation and silicon enablement.
- Participate in architectural definitions and define microarchitecture for subsystem and chip level.
- Lead top-level integration, logic design and RTL implementation.
- Perform and drive quality checks: assertions, lint, CDC, and static timing analysis (STA).
- Review and integrate third-party IPs (examples: ARM cores, DDR controllers, UCIe PHY) at top level.
- Collaborate with verification engineers to ensure sound SoC-level design and with physical designers on timing constraints, synthesis, DFT insertion and STA.
- Support silicon bring-up including ATE vector generation, test plan execution and debug.
- Coordinate with external service providers for DFT, package/PI and physical design support.
Requirements
Must-have technical skills and experience; a short list of preferred additions follows.
- Extensive hands-on experience in ASIC/SoC design flow from RTL through tape-out, including synthesis and timing closure.
- Proven expertise with RTL implementation and top-level integration, and running lint, CDC and STA flows.
- Experience with commercial IP integration and review (UCIe, DDR, CPU, Ethernet and similar interfaces).
- Experience with ATE vector generation, silicon testing and bring-up procedures.
- Good understanding of PPA (performance, power, area) trade-offs and SoC-level optimization.
- Experience interfacing with third-party service companies (DFT, PI, PD).
- Strong verbal and written communication, collaborative working style, and demonstrated problem-solving ability.
- Nice-to-have: prior work with AMBA bus fabrics and ARM core-based subsystems; experience developing memory/storage controllers; mentoring or technical leadership experience.
Education Requirements
Degree preferred in Electrical Engineering, Computer Science or a related technical field. Posting specifies preferred experience levels tied to degree: PhD with ~15+ years industry experience; Master’s with ~18+ years; Bachelor’s with ~20+ years. Equivalent specialized industry experience at the stated seniority may be considered.
About the Company
Company: Samsung Semiconductor
Headquarters: San Diego, California, United States
Samsung Semiconductor is a global leader in semiconductor technology, providing innovative solutions for diverse applications including smartphones, electric vehicles, and data centers. As part of Samsung's Advanced Institute of Technology, the company focuses on cutting-edge research in areas such as CPU microarchitecture, AI, and HPC, fostering a diverse and inclusive work environment for its employees to thrive and innovate.
