Principal Engineer – Multi-Physics Sign-off (Timing, PDN & Thermal)

Job Title

Principal Engineer – Multi-Physics Sign-off (Timing, PDN & Thermal)

Role Summary

Develop and support production-ready physical-design and signoff methodologies for 3DIC and 2.5D multi-die systems across timing, power/PDN, thermal, CFD/FEM, and multiphysics analysis. Collaborate with physical design, package, PI, reliability, and EDA vendor teams to deliver automated flows from floorplanning to tapeout.

Experience Level

Senior (Principal/Staff level). Minimum 5+ years of system-level experience in advanced-node implementation and signoff for multi-die or advanced packaging designs.

Responsibilities

Hands-on delivery of tool flows, automation, and methodology for multi-die implementation and signoff. Key responsibilities include:

• Develop and qualify CAD flows for 3DIC and 2.5D designs (chiplets, interposers, TSVs, micro-bumps).
• Enable end-to-end implementation and signoff: floorplanning, timing closure, power/IR/EM, and tapeout preparation.
• Develop STA methodologies for cross-die timing, constraints, and closure strategies.
• Implement power analysis and IR/EM signoff flows for multi-die systems.
• Develop thermal and CFD/FEM-based methodologies and support electro-thermal coupling with power and reliability analysis.
• Build automation, scripts, checks, and infrastructure to improve flow robustness and runtime.
• Document flows, produce training materials, and provide CAD support during active design cycles.
• Collaborate with package, PI, reliability, design teams and EDA vendors for tool evaluation, qualification, and upgrades.

Requirements

Core must-have skills and relevant experience, followed by optional qualifications.

• VLSI knowledge and practical system-level understanding.
• Minimum 5+ years of system-level experience in implementation/signoff.
• Strong hands-on experience with 3DIC and/or 2.5D designs and chiplet-based systems.
• Experience owning flows, scripting/automation, and debugging CAD toolchains.

• Experience with TSVs, micro-bumps, interposers and advanced packaging tradeoffs.
• Familiarity with industry EDA tools for 3DIC (examples: Cadence Integrity 3D-IC, Synopsys 3DIC Compiler).
• Experience with thermal tools and CFD/FEM workflows (examples: Cadence Celsius, Ansys Icepak, Ansys RHSC-ET).

Education Requirements

Not specified.

About the Company

Company: Arm

Headquarters: Cambridge, United Kingdom

ARM is a global leader in semiconductor and software design, driving innovation in computing technology. The company specializes in designing processors and systems that provide the essential building blocks for electronic devices. ARM's architecture is widely used in smartphones, servers, and IoT devices, and its collaborative culture fosters bold thinking, diversity, and high-impact benefits for its talented workforce.