Principal Engineer, Mixed Signal Logic Design Engineer
Design and verify RTL for mixed-signal and high-speed IP blocks used in cell libraries, functional units, IP blocks, and subsystems for SoC integration. Lead architecture and microarchitecture discussions, ensure designs meet power, performance, area, and timing targets, and drive technical direction across teams.
As a principal engineer, provide domain expertise, mentor technical leaders, and align technical strategy with organizational goals.
Senior β position expects extensive experience. Minimum qualifications reference approximately 12+ years of relevant experience.
Primary responsibilities include:
Must-have and preferred technical skills (degrees are summarized separately under Education Requirements):
Minimum: Bachelor's degree in Computer Science, Computer Engineering, Electrical Engineering, or a related STEM field with ~12+ years of relevant experience. Preferred: Master's degree in a related STEM field with ~10+ years of experience, or PhD in a related STEM field with ~8 years of experience.
Company: Intel Corporation
Headquarters: Santa Clara, California, USA
Intel Corporation is a leading multinational technology company known for its innovative semiconductor solutions, including microprocessors, artificial intelligence accelerators, and memory products. Headquartered in the United States, Intel focuses on cutting-edge technology and a collaborative working environment, driving advancements in semiconductor manufacturing to meet global demands. The company emphasizes professional development and aims to shape the future of technology through groundbreaking designs.
