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Principal Engineer, Mixed Signal Logic Design Engineer

Intel Corporation
June 28, 2026
Full-time
On-site
Folsom, California, United States
$220,920 - $311,890 USD yearly
RTL Design Jobs, Level - Senior

Job Title

Principal Engineer, Mixed Signal Logic Design Engineer

Role Summary

Design and verify RTL for mixed-signal and high-speed IP blocks used in cell libraries, functional units, IP blocks, and subsystems for SoC integration. Lead architecture and microarchitecture discussions, ensure designs meet power, performance, area, and timing targets, and drive technical direction across teams.

As a principal engineer, provide domain expertise, mentor technical leaders, and align technical strategy with organizational goals.

Experience Level

Senior β€” position expects extensive experience. Minimum qualifications reference approximately 12+ years of relevant experience.

Responsibilities

Primary responsibilities include:

  • Develop RTL, perform RTL simulation, and optimize logic for mixed-signal and high-speed IP.
  • Define architecture and microarchitecture for blocks being designed.
  • Apply strategies and tools to meet power, performance, area, and timing (PPA/T) goals and ensure physical implementation integrity.
  • Review and validate verification plans; debug and resolve failing RTL tests.
  • Support SoC customers for high-quality IP integration.
  • Influence technical direction across the organization, drive technical strategy, and mentor other engineers.

Requirements

Must-have and preferred technical skills (degrees are summarized separately under Education Requirements):

  • Must-have: Proficiency in SystemVerilog, including OVM/UVM methodologies.
  • Must-have: Experience developing IP or SoC verification environments, writing validation plans, and executing test cases.
  • Must-have: Strong RTL coding, simulation, and logic-optimization experience targeting PPA and timing goals.
  • Must-have: Experience debugging/resolving RTL test failures and ensuring design correctness.
  • Must-have: Experience supporting SoC integration and working with cross-functional teams.
  • Nice-to-have: Experience with DFI/DDR/LPDDR protocols.
  • Nice-to-have: DDR PHY verification or Memory Controller verification experience.
  • Nice-to-have: Demonstrated leadership, mentoring, and ability to drive technical strategy.

Education Requirements

Minimum: Bachelor's degree in Computer Science, Computer Engineering, Electrical Engineering, or a related STEM field with ~12+ years of relevant experience. Preferred: Master's degree in a related STEM field with ~10+ years of experience, or PhD in a related STEM field with ~8 years of experience.


About the Company

Company: Intel Corporation

Headquarters: Santa Clara, California, USA

Intel Corporation is a leading multinational technology company known for its innovative semiconductor solutions, including microprocessors, artificial intelligence accelerators, and memory products. Headquartered in the United States, Intel focuses on cutting-edge technology and a collaborative working environment, driving advancements in semiconductor manufacturing to meet global demands. The company emphasizes professional development and aims to shape the future of technology through groundbreaking designs.

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Date Posted: 2026-06-25