Principal Engineer - Low Power MSIC Analog System Technologist

Job Title

Principal Engineer - Low Power MSIC Analog System Technologist

Role Summary

Senior technical lead responsible for defining architecture, driving transistor-level mixed-signal IC design, and enabling system integration of ultra-low-power ASICs for Robotics, Industrial IoT (IIoT) and XR applications. Role sits in the ASICS Engineering team and spans analog, digital, firmware and system domains.

Lead programs from initial architecture and specification through simulation, verification, tape-out, and early silicon bring-up, working closely with cross-functional teams and external design partners.

Experience Level

Senior-level. The posting lists degree-dependent experience examples (e.g. Bachelor's + ~8 years, Master's + ~7 years, PhD + ~6 years) and also shows alternatives with ~10–15+ years for advanced degrees; typical expectation is ~8–15+ years of ASIC/mixed-signal experience depending on qualifications.

Responsibilities

The role combines architecture, hands-on analog/mixed-signal design, verification, and silicon bring-up.

• Define end-to-end system architecture and partitioning across analog, digital, firmware, and system domains.
• Drive architectural trade-offs across power, performance, noise, latency, and silicon area.
• Lead transistor-level design and feasibility studies for mixed-signal blocks (ADCs, DACs, PLLs/DLLs, LDOs, SerDes).
• Architect and integrate ultra-low-power AFEs and power-management circuits for battery-operated IIoT, XR and robotics sensor ASICs.
• Oversee pre-silicon verification across PVT corners and industry-standard simulators; develop behavioral/system models to evaluate noise, linearity, and SNR.
• Support post-silicon bring-up, characterization, reliability qualification (HTOL, burn-in) and collaborate with packaging, test, and system teams.
• Manage interactions with third-party IP vendors, design houses, and internal chip/system leads through to productization.
• Enable system-level deployment including sensor data acquisition, sensor fusion, and edge AI inference; contribute to hardware–software integration.

Requirements

Must-have technical skills and proven experience for immediate impact. Preferred items follow.

• Must-have: Extensive industry experience in mixed-signal IC and system-level design and demonstrated chip-level technical leadership (chip lead, system architect, technical lead).
• Must-have: Hands-on transistor-level design experience for ADCs, DACs, PLLs/DLLs, LDOs, SerDes and other mixed-signal building blocks.
• Must-have: Strong expertise in low-power analog and mixed-signal (AMS) IC design, including RF/WiFi/BTE and PMU architectures for ultra-low-power applications.
• Must-have: Tool experience: Cadence Virtuoso and analog/AMS simulators; familiarity with Verilog for mixed-signal flows.
• Must-have: Circuit simulators and flows: Spectre, HSPICE, and board-level simulation methodologies; knowledge of PDKs, LVS, DRC, and PEX flows.
• Must-have: Experience with pre-silicon verification and post-silicon characterization; understanding of ESD and reliability standards (HBM, CDM, TLP).
• Must-have: Ability to develop behavioral/system-level models (MATLAB/Simulink or equivalent) for noise, linearity and system evaluation.
• Preferred: Experience with digital design flows (synthesis, timing analysis), firmware development, and embedded interfaces (I2C, I3C, SPI, MIPI, etc.).
• Preferred: Scripting proficiency (Python/Matlab), deep submicron CMOS process experience, IC packaging and board-level validation exposure, and sensor/edge-AI system experience.
• Soft skills: Strong technical leadership, cross-functional communication, mentoring ability, and experience managing external vendors and IP providers.

Education Requirements

Posting requests a Bachelor's, Master's or PhD in Electrical Engineering, Science, Engineering or a related field, or equivalent practical experience. The posting gives degree-dependent experience examples (e.g. BSc + ~8 years; MSc + ~7 years; PhD + ~6 years) and also includes alternate ranges (PhD ~10–12 years or MS ~13–15+ years). Equivalent professional experience will be considered.

About the Company

Company: Qualcomm

Headquarters: San Diego, California, United States

Qualcomm is a global leader in semiconductor and telecommunications equipment, specializing in mobile technologies and innovations. Known for its Adreno GPUs, the company provides solutions enabling advancements in mobile gaming, AI, VR/AR, and autonomous driving. Qualcomm's cutting-edge technology and commitment to high-performance, power-efficient designs drive the evolution of mobile graphics and connectivity worldwide.