Principal Engineer, IO Design

Job Title

Principal Engineer, IO Design

Role Summary

Lead design engineer responsible for development, optimization, verification, and rollout of high-speed I/O and clocking circuits for DRAM products. Works within the analog/mixed-signal design team and collaborates with product engineering, signal integrity, process integration, and transistor modeling teams.

Experience Level

Senior / Principal level. Minimum industry experience expectations are high; the posting specifies long-tenure senior requirements (see Education Requirements for formal baseline).

Responsibilities

Primary responsibilities include circuit-level design, performance analysis, and cross-team engineering support.

• Design, optimize, and verify high-speed IO and clocking circuits for DRAM products.
• Develop equalization and bandwidth-extension techniques; analyze IO impairments, clock jitter, and duty-cycle error impacts on system timing budgets.
• Create modeling, analysis, and simulation methodologies to capture circuit performance and product-spec impacts at full-chip and system levels.
• Support silicon correlation: compare silicon performance with simulation and lead correlation activities with Product Engineering and SI teams.
• Collaborate with process integration and transistor modeling teams for next-node process enablement.
• Supervise layout work and enforce high-speed layout practices to minimize parasitics.

Requirements

Must-have technical skills and abilities are listed below. Degree and years-of-experience requirements are listed under Education Requirements.

• Proficiency with UNIX and Cadence toolflow (simulation, schematic entry, SPF extraction).
• Solid understanding of device physics and CMOS processing techniques.
• Experience supervising layout and applying layout techniques for high-speed circuits.
• Strong verbal and written communication skills to convey technical concepts to peers.
• Ability to work concurrently across multiple product teams and support silicon validation efforts.

Preferred / Nice-to-have:

• Experience designing high-speed transmitters, receivers, and clocking circuits with proven silicon results.
• Familiarity with channel modeling, transceiver noise and timing-budget analysis, equalization techniques, and signal-integrity (SI) concepts.
• Mentoring and coaching experience for early-career engineers.
• Experience using AI/ML and scripting (Perl, Python).

Education Requirements

Minimum formal baseline: MSEE plus 10 years of industry experience, or BSEE plus 12 years of industry experience in analog and mixed-signal circuit design (electrical/electronic engineering focus). No certifications were specified.

About the Company

Company: Micron Technology

Headquarters: Boise, Idaho, USA

Micron Technology is a global leader in memory and storage solutions, dedicated to transforming how the world uses information. The company offers a diverse portfolio of high-performance DRAM, NAND, and NOR memory products under the Micron and Crucial brands. With a commitment to customer focus and technological innovation, Micron drives advancements in artificial intelligence, 5G, and other data-centric applications, empowering users to learn, communicate, and progress.