Principal Engineer, Interface IP Verification (Pre-Silicon — PCIe / CXL / DDR / Ethernet)
SynopsysJob Title
Principal Engineer, Interface IP Verification (Pre-Silicon — PCIe / CXL / DDR / Ethernet)
Role Summary
Lead end-to-end pre-silicon verification of Interface IP blocks (PCIe, CXL, DDR, Ethernet) from architecture review through silicon signoff. You will develop scalable, reusable UVM-based testbenches, define verification strategies and signoff criteria, and collaborate with architecture, design, firmware, and systems teams.
Experience Level
Senior — requires extensive hands-on ASIC/SoC verification experience (10+ years indicated in source).
Responsibilities
Own verification delivery and technical leadership for Interface IP verification projects.
- Define verification strategies and test plans covering protocol compliance, performance corners, and system integration.
- Design and maintain scalable UVM/SystemVerilog verification environments and VIP.
- Develop constrained-random, coverage-driven tests to achieve functional coverage closure and signoff.
- Debug complex issues across RTL, timing, protocol state machines, and testbench infrastructure using VCS or equivalent simulators.
- Collaborate with architecture/design/firmware teams to detect and resolve issues early in the cycle.
- Mentor and coach verification engineers on methodology, coverage analysis, and debugging practices.
Requirements
Key technical and experiential requirements.
- 10+ years of hands-on ASIC or SoC verification experience (specified in source).
- Deep expertise in SystemVerilog and UVM methodology; proven record building scalable verification environments.
- Strong protocol knowledge in at least one of PCIe, CXL, DDR, or Ethernet and ability to translate specs into verification requirements.
- Proven experience with constrained-random and coverage-driven verification targeting signoff quality.
- Solid debugging skills across RTL, verification infrastructure, and protocol compliance; experience using industry-standard simulators (VCS, ModelSim, or equivalent).
Nice-to-have:
- Experience with verification IP development, assertion-based verification, or formal methods.
- Familiarity with modern SoC architectures and high-speed communication interfaces.
- Experience leading technical discussions and mentoring engineering teams.
Education Requirements
Bachelor's or Master's degree in Electrical Engineering or Computer Engineering (specified in source).
About the Company
Company: Synopsys
Headquarters: Mountain View, California, USA
Synopsys is a leading company in electronic design automation (EDA) and semiconductor IP solutions. It provides tools and services for designing and verifying complex semiconductor devices and systems. The company plays a pivotal role in the semiconductor industry, helping engineers innovate and deliver higher-quality products faster. Synopsys is committed to advancing technology standards and offers a range of software and hardware solutions to its clients globally.
