Principal Engineer - HIG HBM Layout

Job Title

Principal Engineer - HIG HBM Layout

Role Summary

Lead end-to-end physical layout for HBM products, covering analog, mixed-signal, custom digital blocks and full-chip integration. Responsible for technical decisions that meet performance, power, and area (PPA) targets, delivery quality, and team development.

Collaborate with global cross-functional teams (Design, Verification, IP, Packaging) and support product integration and customer needs.

Experience Level

Senior — 15+ years in analog/custom layout; 4+ years leading teams and projects.

Responsibilities

Primary responsibilities include hands-on layout, project leadership, verification closure, and team development.

• Lead layout execution for analog, mixed-signal, and custom digital blocks (array layout, decoders, control logic, IOs, PLLs, ADCs/DACs, LDOs, bandgaps, reference generators, charge pumps, current mirrors, comparators, differential amplifiers) and full-chip HBM integration.
• Own full-chip technical decisions covering analog, digital, memory, ESD, EM/IR to meet PPA goals.
• Plan and track project schedules, area/time estimates, task delegation, and milestones across multiple concurrent programs.
• Ensure timely delivery of block-level and full-chip layouts with required quality and documentation.
• Oversee layout verification activities including DRC, LVS, antenna checks and ensure closure with proper audits.
• Mentor and grow the layout team; conduct design reviews and guide junior engineers.
• Drive productivity and innovation, including adoption of automation and AI to reduce layout effort and improve turnaround time.
• Support product and customer integration: specification alignment, design clarifications, and successful implementation.

Requirements

Must-have technical skills and leadership experience.

• 15+ years experience in analog/custom layout in advanced CMOS processes.
• 4+ years developing teams and leading projects; proven experience leading multiple projects and tape-outs.
• Expertise with Cadence VLE/VXL and Calibre DRC/LVS.
• Strong layout, floorplanning, and manual routing skills; experienced running multiple custom IC layout projects.
• Proven ability to work in multi-functional, multi-site teams across time zones.
• Excellent verbal and written communication skills.
• Preferred: experience applying AI-assisted techniques and AI tools to automate workflows and improve efficiency.

Education Requirements

BE or MTech in Electronic Engineering or VLSI Engineering.

About the Company

Company: Micron Technology

Headquarters: Boise, Idaho, USA

Micron Technology is a global leader in memory and storage solutions, dedicated to transforming how the world uses information. The company offers a diverse portfolio of high-performance DRAM, NAND, and NOR memory products under the Micron and Crucial brands. With a commitment to customer focus and technological innovation, Micron drives advancements in artificial intelligence, 5G, and other data-centric applications, empowering users to learn, communicate, and progress.