Principal Engineer, Digital Design
RenesasJob Title
Principal Engineer, Digital Design
Role Summary
Lead RTL design and delivery of complex IPs and subsystems for MCU SoCs. Own micro-architecture and high-level digital design for assigned blocks, support SoC integration, and mentor junior engineers.
This role focuses on driving RTL quality, integration with verification and physical design teams, and improving RTL methodologies to meet performance, power, and area objectives.
Experience Level
Senior — minimum of 15 years of hands-on experience in digital IC/ASIC design.
Responsibilities
Key responsibilities include:
- Lead RTL design and development of complex IPs and subsystems within MCU SoCs to meet PPA targets.
- Define micro-architecture and high-level digital design for assigned blocks.
- Support SoC integration and deliver subsystem views and documentation to back-end and design verification teams.
- Own RTL quality checks (lint, CDC, RDC) and support functional verification of assigned blocks.
- Collaborate with system architects, verification, physical design, and software teams to define specifications and ensure integration.
- Provide technical guidance and mentorship to junior engineers and contribute to continuous improvement of RTL methodologies and coding guidelines.
Requirements
Must-have technical skills and experience:
- 15+ years of hands-on experience in digital IC/ASIC design with a track record of delivered silicon.
- Strong RTL design experience using Verilog and/or VHDL.
- Solid understanding of digital design principles, timing analysis, clocking, resets, and verification methodologies.
- Experience with industry-standard EDA tools for synthesis, simulation, and static timing analysis.
- Strong problem-solving skills and ability to own blocks end-to-end.
Nice-to-have (preferred):
- Experience owning complex IPs or subsystem designs in large SoCs.
- Background in micro-architecture design and high-level digital design.
- Hands-on experience with RTL quality tools such as Spyglass (Lint, CDC, RDC).
- Experience with low-power design techniques and synthesis/timing constraint flows.
- Scripting experience (Shell, Perl, Python) or experience applying AI to design flows.
Education Requirements
Bachelor's degree in Electronics & Communication Engineering, Electrical Engineering, Computer Engineering, or a related technical field.
About the Company
Company: Renesas
Headquarters: Hitachinaka, Japan
Renesas is a global leader in embedded semiconductor solutions, providing high-quality products across automotive, industrial, infrastructure, and IoT sectors. With over 22,000 employees in more than 30 countries, the company focuses on scalable solutions that enhance user experience and drive innovation while committed to sustainability and energy efficiency.
