Principal Engineer, DFT (PE DFT)

Job Title

Principal Engineer, DFT (PE DFT)

Role Summary

Lead DFT activities for high-speed mixed-signal PMIC designs on the MIC Design team in Bangalore. Drive DFT implementation, pattern development, silicon bring-up, and cross-functional coordination to improve test coverage and yield.

Report to the Director of Engineering; collaborate with Test Engineering and EDA teams to deploy flows and resolve silicon issues.

Experience Level

Senior — 8–12 years of relevant hands-on experience in Design for Test (DFT).

Responsibilities

Key responsibilities include end-to-end DFT implementation, silicon debug, and cross-team coordination.

• Develop and execute full DFT for mixed-signal designs.
• Create, validate and deploy reusable DFT IP and flows.
• Analyze low coverage for stuck-at and at-speed faults and debug failures.
• Collaborate with Test Engineering on test-program development, silicon bring-up, diagnosis, and yield improvement.
• Work with EDA R&D to propose and implement new tool and flow features.
• Implement scripting and automation for flow deployment and maintenance.
• Support MBIST and LBIST design and verification.

Requirements

Must-have technical skills and experience; preferred items noted.

• Strong understanding of DFT concepts: scan compression (EDT), scan stitching, fault models (stuck-at, delay/transition), EDT, OCC, and SOC DFT architecture.
• Basic knowledge of DFT for mixed-signal designs and proven silicon debug/sign-off experience.
• Familiarity with synthesis, RTL coding, and static timing analysis (STA).
• Proven ability to deliver high-quality DFT patterns and lead project-level DFT tasks.
• Effective problem-solving and communication skills; ability to work cross-functionally.
• Nice-to-have: Hands-on experience with Tessent ATPG; experience with scripting languages (Perl, Python, Tcl, Shell).

Education Requirements

Bachelor's or Master's in Engineering (BTech / BE / ME / MTech) in a relevant engineering discipline. The role expects approximately 8–12 years of relevant DFT experience.

About the Company

Company: Rambus

Headquarters: Sunnyvale, California, USA

Rambus is a global leader in advanced semiconductor and technology solutions, specializing in enhancing data access and improving performance in computing, networking, and storage applications. The company is known for its innovative IP and solutions in memory, security, and interface technologies. With a strong focus on research and development, Rambus continues to push the boundaries of technology to meet the growing demands of the digital age.