Principal Engineer, DFT

Job Title

Principal Engineer, DFT

Role Summary

Principal-level role in Arm's Central Engineering DFT Architecture and Methodology team. Define DFT architectures, methodologies and implementation flows for Arm CPUs, GPUs, IP blocks, AI accelerators and SoCs to enable scalable, production-quality test solutions.

Collaborate with product teams, system architects, design engineers and EDA vendors to evaluate technologies, produce architecture specifications, and guide deployment across multiple engineering organizations. Relocation support and visa sponsorship are available where required.

Experience Level

Senior / Principal level. Requires extensive, senior technical experience in DFT architecture and delivery; specific years of experience not stated.

Responsibilities

Lead technical DFT architecture and method development and provide cross-team technical leadership.

• Define DFT architecture for next-generation IPs and SoCs, including AI and hyperscale products.
• Develop and drive reusable, scalable DFT methodologies and implementation flows.
• Evaluate emerging DFT technologies and lead investigations to address future product challenges.
• Collaborate with architecture, implementation, verification and physical design teams to define robust test solutions.
• Work with EDA vendors to influence roadmaps and evaluate new capabilities.
• Produce architecture specifications, methodology documentation and deployment guidance.
• Provide technical leadership and mentorship across projects and support strategic engagements with customers, partners and standards bodies.
• Contribute to technical publications, patents and industry conferences.

Requirements

Must-have technical skills and experience required for the role.

• Extensive experience in Design-for-Test architecture and implementation at principal or senior principal level.
• Strong understanding of SoC DFT methodologies: scan architectures and compression, ATPG and fault simulation, at-speed testing, memory and logic BIST, JTAG/IEEE 1149.1, IJTAG/IEEE 1687, DFT verification and debug.
• Experience developing reusable DFT methodologies and automation rather than one-off project solutions.
• Experience with commercial DFT tools such as Siemens Tessent, Synopsys and/or Cadence DFT toolsets.
• Strong scripting skills (Perl, Tcl and/or Python) and Linux/Unix proficiency.
• Proven problem-solving, analytical and cross-team communication skills with ability to influence technical direction.

Nice-to-have:

• Experience defining DFT architecture for large-scale SoCs, heterogeneous compute, AI accelerators or hyperscale systems.
• Familiarity with IEEE 1500, IEEE 1838, advanced IJTAG methods, Streaming Scan Network (SSN), chiplet/3DIC architectures, silicon bring-up and production test.
• Experience working with EDA vendors on new technology development and knowledge of synthesis, STA and physical implementation considerations for DFT.
• Experience with formal verification/simulation and a record of patents or conference publications.

Education Requirements

Degree (or equivalent practical experience) in Electronic Engineering, Computer Engineering or a related discipline.

About the Company

Company: Arm

Headquarters: Cambridge, United Kingdom

ARM is a global leader in semiconductor and software design, driving innovation in computing technology. The company specializes in designing processors and systems that provide the essential building blocks for electronic devices. ARM's architecture is widely used in smartphones, servers, and IoT devices, and its collaborative culture fosters bold thinking, diversity, and high-impact benefits for its talented workforce.