Principal Engineer, DFT

Job Title

Principal Engineer, DFT

Role Summary

Lead the Design-for-Test (DFT) effort for Kepler's memory products. Architect and deliver end-to-end DFT solutions from definition through RTL, netlist, verification and tapeout, balancing test coverage, test time, area overhead and power.

Experience Level

Senior - requires 15+ years of hands-on DFT architecture and implementation experience on complex ASIC/SoC designs with multiple silicon tapeouts.

Responsibilities

Primary responsibilities include technical leadership of DFT architecture, implementation, verification and production test readiness.

• Own DFT architecture and implementation end to end: definition, RTL, netlist, verification and tapeout.
• Design programmable memory BIST engines: test algorithms, address sequencing, repair flow and fail analysis.
• Design repair and redundancy management (hard/soft repair), repair data storage, fail logging and diagnostics infrastructure.
• Define DFT strategy: full-scan ATPG, embedded compression, MBIST, JTAG, boundary scan and hierarchical integration.
• Drive test coverage closure: fault models, coverage targets and ATPG pattern optimization.
• Collaborate with architecture, RTL, physical design, packaging and post-silicon validation teams to make DFT-aware decisions early.
• Establish DFT best practices, sign-off infrastructure and documentation standards.

Requirements

Must-have technical skills and experience.

• 15+ years hands-on DFT architecture and implementation on complex ASIC/SoC designs with multiple tapeouts.
• Deep ATPG expertise: stuck-at, transition, path delay, cell-aware using industry-standard DFT tools.
• Strong MBIST architecture and implementation experience for large designs.
• Hands-on experience designing or modifying programmable BIST engines, including repair flow and diagnostics.
• Strong knowledge of JTAG TAP controller design and boundary scan (BSR, BSDL, compliance).
• Solid understanding of hierarchical DFT architecture, scan chain partitioning and scan compression.
• Knowledge of DFT-aware RTL practices and interaction with physical design.
• Experience with ATE interfaces and production test program development.
• Strong scripting skills (Python, Tcl, Perl).
• Excellent communication skills and proven ability to own complex DFT solutions end to end.

Nice-to-have:

• Experience with memory test, repair and yield learning in high-volume manufacturing.
• Knowledge of DFT and test strategies for 3D innovations.
• Prior startup experience with lean teams and aggressive schedules.

Education Requirements

B.Tech / M.Tech / MS in Electrical Engineering, ECE, Computer Engineering or a related technical field.

About the Company

Company: Keplercompute

Headquarters: San Jose, California, United States

Kepler is a semiconductor startup developing a new class of AI memory and logic using advanced materials and 3D architectures to build UHBM-based 3D-memory AI accelerator platforms. The team includes experienced semiconductor veterans and partners with foundries and customers to move lab technologies toward production.