Job Title
Principal Engineer - Design
Role Summary
Senior RTL/ASIC design engineer for the Networking and Communications Group in Hauppauge, NY. The role focuses on designing and delivering connectivity silicon such as Ethernet switches/bridges, USB hubs and power delivery, PCIe bridges, and SerDes interfaces.
This position contributes across specification, RTL implementation, simulation/emulation, and silicon bring-up to take products from concept to production.
Experience Level
Senior β 10+ years of relevant industry experience.
Responsibilities
Primary duties include RTL design and integration, verification handoff, and system-level debug for connectivity products.
- Develop and deliver digital RTL using Verilog/SystemVerilog for connectivity IP and SoC subsystems.
- Participate in ASIC design and verification flows, including simulation, FPGA emulation, and lab bring-up.
- Implement and validate interfaces and protocols (Ethernet, USB, PCIe, SerDes) at block and system level.
- Debug silicon/FPGA failures, root-cause hardware/firmware issues, and drive fixes to closure.
- Create and maintain technical documentation, design specs, and verification plans.
- Collaborate with cross-functional teams (verification, firmware, system, product) and mentor junior engineers.
- Support occasional travel for lab work or cross-site collaboration (up to ~25%).
Requirements
Key skills and experience required and preferred for successful performance in this role.
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Must-have: Strong practical experience with Verilog/SystemVerilog and digital design projects.
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Must-have: Hands-on experience with ASIC design and/or verification flows.
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Must-have: Experience with one or more connectivity domains: Ethernet, USB, and/or PCIe.
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Must-have: Strong problem solving, debugging, documentation, and verbal/written communication skills.
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Must-have: Ability to work effectively in a collaborative engineering team.
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Preferred / Nice-to-have: Knowledge of USB Power Delivery, PCIe, Ethernet (10/100/1G, 1Gβ25G SerDes).
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Preferred / Nice-to-have: Experience with peripheral interfaces (SPI, I2C, UART) and simulation tools.
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Preferred / Nice-to-have: Experience with Xilinx FPGA emulation and hardware debug.
Education Requirements
Bachelor's degree in Electrical Engineering or equivalent engineering degree is required; the role expects ~10+ years of relevant industry experience. Equivalent practical experience is acceptable.
About the Company
Company: Microchip
Headquarters: Chandler, Arizona, USA
Microchip is a leading semiconductor company focused on developing innovative solutions to enhance the human experience. With a commitment to empowering innovation, Microchip prioritizes the value of its employees by fostering a culture that supports their growth and contributions.

Date Posted: 2026-07-27