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Principal Engineer

Marvell Technology
November 2, 2026
Full-time
On-site
Santa Clara, California, United States
$290,000 - $330,000 USD yearly
Physical Design Jobs, Level - Senior

Job Title

Principal Engineer

Role Summary

Lead physical design and methodology work for high-performance processor and ASIC designs in advanced CMOS process technologies. The role focuses on taking designs from prototype to production for applications including server, 5G/6G, automotive, and networking.

Work on a cross-functional engineering team to define implementation approaches, validate designs before tape-out, and improve design flows and tools.

Experience Level

Senior level. The posting specifies a minimum of five years of relevant experience in roles such as Technical Lead, Design Engineer, or Hardware Engineer.

Responsibilities

Primary responsibilities include technical leadership of physical design efforts and cross-team coordination.

  • Define and implement physical design and methodology for processor/ASIC projects.
  • Collaborate with product owners, project managers, frontend and backend engineers to deliver design milestones.
  • Use and improve engineering design tools, flows, and practices to scale prototypes to production.
  • Perform feasibility studies, verification, and validation of new and modified designs; ensure design readiness for tape-out.
  • Create and maintain technical documentation and transition plans for design revisions.
  • Coordinate with equipment partners and external technical teams when needed.
  • Participate in agile processes and Scrum meetings (planning, reviews, retrospectives).
  • Investigate and propose technology or process improvements to enhance design quality and efficiency.
  • Travel to client sites within the US as required (approximately 10%–15%).

Requirements

Must-have technical skills, compliance, and experience for successful performance in this role.

  • Proven experience in physical design and design methodology for complex SoC/processor or ASIC projects.
  • Hands-on experience with advanced CMOS process design flows and production tape-out processes.
  • Experience working across frontend and backend domains and integrating design changes in controlled environments.
  • Strong documentation, technical communication, and stakeholder coordination skills.
  • Experience improving or defining flows, tools, or automation that accelerate delivery and quality.
  • Eligibility to access export-controlled technology and willingness to participate in export license review processes where required.

Education Requirements

Bachelor’s degree or foreign equivalent in Computer Science, Engineering (any), CIS, MIS, or a related field, plus five (5) years of experience in the job offered or in roles such as Technical Lead, Design Engineer, or Hardware Engineer.


About the Company

Company: Marvell Technology

Headquarters: Santa Clara, California, United States

Marvell’s semiconductor solutions serve as essential building blocks of the data infrastructure connecting our world, driving innovation across enterprise, cloud, AI, and carrier architectures. The company focuses on creating transformative technology that shapes the future.

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Date Posted: 2026-10-29