Principal Engineer, ASIC or Senior Principal Engineer, ASIC

Job Title

Principal Engineer, ASIC or Senior Principal Engineer, ASIC

Role Summary

Northrop Grumman Space Systems — Digital Space Technology group in Manhattan Beach, CA — seeks an engineer to design, verify, and integrate digital ASIC/FPGA systems for space applications. Work includes RTL development, verification, synthesis, timing analysis and lab integration.

Position may be filled at Principal or Senior Principal level. Travel ~10%. Role is contingent on program award and funding. Salary ranges: Principal: $125,300–$187,900; Senior Principal: $156,400–$234,600 (annual).

Experience Level

Senior. The position may be filled at either Principal or Senior Principal level. Experience guidance: Principal — STEM Bachelor's +5 years, STEM Master's +3 years, STEM PhD +1 year; Senior Principal — STEM Bachelor's +8 years, STEM Master's +6 years, STEM PhD +4 years.

Responsibilities

Typical responsibilities include:

• Develop RTL (VHDL or Verilog) for ASIC and FPGA digital systems.
• Create and execute simulation, emulation and lab integration tasks.
• Perform synthesis, static timing analysis, and logic equivalence checks.
• Develop verification plans and verification test benches (VHDL/SystemVerilog).
• Trace requirements and perform reviews and audits of simulation procedures and test environments.
• Support hardware bring-up and debugging in the lab.

Requirements

Must-have and preferred qualifications:

• Must-have: Proven RTL design experience (VHDL or Verilog) for space or high-reliability applications.
• Must-have: Experience developing ASIC/FPGA architecture from requirements; simulation, synthesis, timing closure, and equivalence checking.
• Must-have: Experience developing verification test benches (VHDL or SystemVerilog) and executing verification plans.
• Must-have: Ability to obtain and maintain an active Government security clearance.
• Must-have: Hands-on lab integration and hardware test experience (debugging, bench testing).
• Nice-to-have: RTL design experience with Xilinx Vivado or Microchip Libero.
• Nice-to-have: SystemVerilog/UVM methodology for verification.
• Nice-to-have: Experience in DSP for digital communications and digital network design.
• Nice-to-have: Active DoD clearance is preferred.

Education Requirements

STEM degree required: Bachelor's, Master's or PhD in a STEM field (examples: Electrical Engineering, Computer Engineering, Computer Science, Physics, Mathematics or other related technical fields). Experience-year guidance is degree-dependent: Principal — BS +5 years, MS +3 years, PhD +1 year; Senior Principal — BS +8 years, MS +6 years, PhD +4 years.

About the Company

Company: Northrop Grumman

Headquarters: Falls Church, Virginia, United States

Northrop Grumman is a leading global aerospace and defense technology company that provides innovative solutions in mission systems, electronics, and software. With a legacy of significant advancements in technology, we empower employees to tackle complex challenges and create revolutionary systems that enhance global security. Our diverse teams focus on engineering innovation and product development, delivering solutions that support military and civilian customers worldwide.