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Principal Engineer, Analog Design (RF)

Microchip
September 04, 2026
Full-time
On-site
Heilbronn, BW, Germany
Device Engineering Jobs, Level - Senior

Job Title

Principal Engineer, Analog Design (RF)

Role Summary

Hands-on senior RFIC design engineer responsible for designing RF CMOS blocks for Bluetooth, Wi‑Fi, UWB and related wireless products. You will lead block-level design, verification and silicon bring-up while working with cross-functional global teams including system, layout, test, and foundry partners.

Experience Level

Senior — expects experienced IC designers. Typical background: Ph.D. +5 years industry RF/Analog CMOS IC design or M.S. +7.5 years.

Responsibilities

Design, verify and deliver RFIC blocks and supervise integration through layout and silicon validation.

  • Design RFIC blocks and modules: RF synthesizers, VCOs, LO generation, transmitter/receiver chains (LNA, mixer, PA, PA driver), baseband blocks, biasing, and matching networks.
  • Produce and own schematics, simulations and performance trade-offs to meet targets for power, area and specifications.
  • Review and supervise layout: floor planning, device matching, routing, shielding and ESD strategies; collaborate closely with layout engineers.
  • Translate top-level radio and product requirements into block-level budgets and circuit specifications with system teams.
  • Lead validation and debug: lab bring-up, bench measurements, correlation to simulation and root-cause analysis of silicon issues.
  • Work with foundry technology teams to ensure correct use of PDKs/models and to leverage device/passive models and reliability constraints.

Requirements

Must-have technical skills and hands-on experience for successful delivery of RF CMOS ICs.

  • Proven experience in RF TX/RX chain design and/or RF PLL/synthesizer design.
  • Extensive product-level tape-out experience and deep understanding of RF‑analog IC design.
  • Strong knowledge of CMOS transistor and inductor physics: noise, linearity, device non-idealities and parasitics.
  • Strong understanding of IC layout and packaging effects on circuit performance, including parasitics, crosstalk and substrate/supply coupling.
  • Hands-on IC test and debug experience with RF lab equipment (spectrum/network analyzers, signal generators, oscilloscopes, etc.).
  • Proficiency with industry-standard tools: Cadence Virtuoso, Spectre/SpectreRF and EM tools (PeakView or similar) for passive/inductor/package modeling.
  • Experience collaborating with cross-functional and foundry teams to resolve technology and modeling issues.
  • Willingness to travel as required (0%–25% indicated).

Education Requirements

Ph.D. in Electrical Engineering or related field with 5+ years of industry RF/Analog CMOS IC design experience, or M.S. in a related field with 7.5+ years of industry experience.


About the Company

Company: Microchip

Headquarters: Chandler, Arizona, USA

Microchip is a leading semiconductor company focused on developing innovative solutions to enhance the human experience. With a commitment to empowering innovation, Microchip prioritizes the value of its employees by fostering a culture that supports their growth and contributions.

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Date Posted: 2026-09-04