Principal Engineer - Analog Design (High-Speed Interfaces)

Job Title

Principal Engineer - Analog Design (High-Speed Interfaces)

Role Summary

Lead architecture, transistor-level design, validation and silicon bring-up of high-speed analog and mixed-signal interface circuits for next-generation semiconductor products. The role partners with digital, verification, layout, packaging, signal integrity, and product teams and provides technical leadership and mentoring to a small analog design team.

Experience Level

Senior level. Requires 15+ years of industry experience in analog/mixed-signal IC design following completion of the Master's degree.

Responsibilities

Deliver and integrate high-speed interface IP and drive first-pass silicon success.

• Architect, design, simulate and optimize high-speed analog/mixed-signal blocks (DFE, CTLE, PLLs, CDRs, transmitters/receivers, bias/reference circuits).
• Perform transistor-level design and circuit optimization for performance, power, area and robustness.
• Lead SerDes front-end and clocking circuit development and validate against standards (PCIe, UCIe, DDR/LPDDR, CXL, USB, Ethernet).
• Drive full-chip integration and cross-functional collaboration with verification, layout, packaging, SI and product teams.
• Analyze and resolve silicon bring-up, characterization and production issues.
• Review designs, verification methodologies and layouts to ensure first-pass silicon success.
• Develop design methodologies and best practices for future interface generations.
• Mentor and technically guide a team of ~3–4 analog engineers; participate in roadmap and architecture discussions.

Requirements

Core technical skills and proven delivery record required; leadership and tool experience expected.

• 15+ years industry experience in analog/mixed-signal IC design (post-Master's).
• Proven track record delivering silicon-proven high-speed interface circuits and IP.
• Deep knowledge of analog circuit fundamentals, high-speed signaling, jitter/noise, equalization and clock recovery techniques.
• Strong transistor-level design skills and experience with CMOS device physics and deep-submicron/FinFET technologies.
• Hands-on experience with Cadence Virtuoso, Spectre/AMS and related verification environments.
• Experience resolving silicon bring-up and characterization issues and collaborating across engineering functions.

Nice-to-have:

• Experience with specific standards and subsystems: PCIe, UCIe, CXL, DDR/LPDDR, USB, Ethernet, SerDes.
• Experience leading small design teams and defining technical roadmaps for interface IP.

Education Requirements

M.S./M.Tech or Ph.D. in Electrical Engineering, Electronics Engineering or a closely related field from a reputed university. The posting specifies 15+ years of industry experience following completion of the Master's degree.

About the Company

Company: Renesas

Headquarters: Hitachinaka, Japan

Renesas is a global leader in embedded semiconductor solutions, providing high-quality products across automotive, industrial, infrastructure, and IoT sectors. With over 22,000 employees in more than 30 countries, the company focuses on scalable solutions that enhance user experience and drive innovation while committed to sustainability and energy efficiency.