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Principal Electrical Engineer

Renesas
August 07, 2026
Full-time
On-site
Palm Bay, Florida, United States
RTL Design Jobs, Level - Senior

Job Title

Principal Electrical Engineer

Role Summary

Design and verify digital circuits and mixed-signal verification environments for radiation‑hardened (RadHard) ASIC products. The role participates across product development phases including specification, RTL design, synthesis, verification, timing analysis, DFT and silicon debug.

Experience Level

Senior-level — typically 10+ years of relevant digital design and verification experience.

Responsibilities

Accountable for architecture, implementation and verification of digital blocks and for integrating digital and analog/mixed‑signal verification.

  • Participate in all stages of product development: specification, design, synthesis, verification, timing analysis, DFT, and silicon debug.
  • Architect and implement RTL for digital interfaces, controllers, state machines and algorithms.
  • Perform synthesis and drive timing convergence.
  • Develop and verify self‑checking testbenches for mixed‑signal chips and subcircuits.
  • Drive verification coverage efficiently and merge AMS and digital verification plans into a master plan.
  • Implement scan insertion and support ATPG generation and DFT activities.
  • Work independently to meet project goals and schedules and contribute to process and team improvements.

Requirements

Must-have technical skills and expectations.

  • 10+ years' practical experience coding Verilog RTL; experience with VerilogAMS, VerilogA or SystemVerilog for ASICs and FPGAs.
  • Proficient at writing synthesis scripts and developing design constraints.
  • Experience with behavioral top‑level modeling and mixed‑signal verification methodologies.
  • Experience with scan insertion and ATPG generation.
  • Proficiency with Cadence design tools and Synopsys Design Compiler; Cadence AMS flow experience is a plus.
  • Strong organizational skills; able to work independently with limited supervision.
  • Written and verbal English proficiency.

Nice-to-have:

  • 15+ years' digital design experience.
  • Radiation‑hardened (Rad‑Hard) design experience.

Education Requirements

Required: Master's degree in Electrical Engineering (MSEE) or PhD in Electrical Engineering or a closely related technical field. PhD is preferred. Relevant industry experience in digital/mixed‑signal ASIC or FPGA design is expected.


About the Company

Company: Renesas

Headquarters: Hitachinaka, Japan

Renesas is a global leader in embedded semiconductor solutions, providing high-quality products across automotive, industrial, infrastructure, and IoT sectors. With over 22,000 employees in more than 30 countries, the company focuses on scalable solutions that enhance user experience and drive innovation while committed to sustainability and energy efficiency.

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Date Posted: 2026-07-30