Principal Digital Verification Engineer, Memory Interface IP (HBM/DDR/LPDDR)
SynopsysJob Title
Principal Digital Verification Engineer, Memory Interface IP (HBM/DDR/LPDDR)
Role Summary
Lead verification of memory interface IP (HBM, DDR, LPDDR) delivering production-quality verification environments, reusable VIP, and coverage-driven closure for Interface IP products. Work closely with design and architecture teams to find root-cause issues before tapeout and mentor other verification engineers.
Experience Level
Senior - requires approximately 8 to 10+ years of hands-on ASIC/SoC verification experience, particularly with memory interface protocols.
Responsibilities
Primary responsibilities include designing verification environments, driving coverage closure, and collaborating with design/architecture teams.
- Design and build SystemVerilog/UVM verification environments and reusable VIP for HBM, DDR, LPDDR, and AMBA protocols.
- Author detailed test plans covering functional scenarios, corner cases, and protocol compliance.
- Execute regression suites using simulation tools, debug failures, and validate design changes.
- Run and analyze functional coverage, track metrics, and drive coverage closure across multi-protocol environments.
- Work with architects and designers to clarify specifications, identify bugs, and close coverage gaps before tapeout.
- Mentor and guide junior verification engineers on UVM best practices and verification strategy.
- Develop reusable verification components to accelerate future projects.
Requirements
Must-have technical skills and relevant experience; nice-to-have items listed separately.
- Must-have: Proven production experience verifying Interface IP protocols such as HBM, DDR, LPDDR, or AMBA.
- Must-have: Strong proficiency in SystemVerilog and UVM, including testbench construction and assertions.
- Must-have: Deep understanding of digital design concepts, timing, protocol compliance, and memory subsystem architecture.
- Must-have: Experience using simulation tools such as VCS, ModelSim, Xcelium, or equivalents for regression and debug workflows.
- Must-have: Demonstrated ability to drive functional coverage closure and deliver fully verified IP on schedule.
- Must-have: Ability to diagnose failing tests quickly (testbench vs design vs timing) and drive to root cause.
- Nice-to-have: Hands-on experience with HBM2/HBM3, DDR4/DDR5, or LPDDR4/LPDDR5.
Education Requirements
Bachelor's or Master's degree in Electrical Engineering or Computer Engineering.
About the Company
Company: Synopsys
Headquarters: Mountain View, California, USA
Synopsys is a leading company in electronic design automation (EDA) and semiconductor IP solutions. It provides tools and services for designing and verifying complex semiconductor devices and systems. The company plays a pivotal role in the semiconductor industry, helping engineers innovate and deliver higher-quality products faster. Synopsys is committed to advancing technology standards and offers a range of software and hardware solutions to its clients globally.
