Principal Digital Verification Engineer

Job Title

Principal Digital Verification Engineer

Role Summary

Lead design and execution of verification strategy and infrastructure for memory interface PHY IP. Work with an international IP team in Ottawa to build durable testbenches, define quality metrics, and influence architecture from a verification perspective.

Drive verification across RTL, firmware, and testbench layers, mentor engineers, and evaluate technologies such as emulation and virtual prototyping to improve verification throughput.

Experience Level

Senior (principal-level). See Education Requirements for specific years-of-experience guidance tied to academic qualifications.

Responsibilities

Primary responsibilities include designing verification plans, building scalable testbenches, and driving debug and quality improvements.

• Develop comprehensive testplans and functional coverage models for firmware running on RTL models of memory PHYs.
• Build and maintain reusable SystemVerilog/UVM testbench infrastructure across multiple product generations.
• Create test cases covering success paths, corner cases, and negative scenarios based on specifications and feature changes.
• Debug complex issues across firmware, RTL, and testbench layers using simulation and waveform analysis tools.
• Participate in technical reviews to influence design and catch verification risks early.
• Research and evaluate virtual prototyping and emulation technologies to improve team efficiency.
• Mentor junior engineers on testbench design, debugging, and verification methodology.

Requirements

Must-have technical skills and experience; nice-to-have items noted separately.

• Must-have: Deep proficiency in SystemVerilog and UVM with a record of building reusable verification components.
• Must-have: Strong command of simulation tools and waveform debuggers; ability to trace issues across abstraction layers.
• Must-have: Solid understanding of C and experience with software/hardware co-simulation.
• Must-have: Experience with assertion-based verification, coverage analysis, and protocol-oriented performance debug.
• Must-have: Comfortable working in Linux with scripting for regression systems, build automation, and source control workflows.
• Nice-to-have: Experience with virtual prototyping or emulation platforms.
• Nice-to-have: Knowledge of LPDDR5/5X, LPDDR6, or other memory interface standards.
• Must-have: Strong communication and collaboration skills for working with distributed teams and conducting technical reviews.

Education Requirements

BSc in Electrical Engineering, Computer Engineering, or a related field with 12+ years of verification experience; MSc with 10+ years; or PhD with 8+ years. (Education-level to years mapping provided in source.)

About the Company

Company: Synopsys

Headquarters: Mountain View, California, USA

Synopsys is a leading company in electronic design automation (EDA) and semiconductor IP solutions. It provides tools and services for designing and verifying complex semiconductor devices and systems. The company plays a pivotal role in the semiconductor industry, helping engineers innovate and deliver higher-quality products faster. Synopsys is committed to advancing technology standards and offers a range of software and hardware solutions to its clients globally.