Principal DFT Engineer

Job Title

Principal DFT Engineer

Role Summary

The Principal DFT Engineer defines chip-level DFT architecture and implements and verifies design-for-test schemes for ASIC/SoC projects. The role partners with design, validation and test teams and supports ATE bring-up and debug. Working location: Shanghai, China.

Experience Level

Senior-level. See Education Requirements for required years of industry experience (14–16+ years depending on degree).

Responsibilities

Key responsibilities include implementing and validating DFT logic and test patterns and supporting test equipment bring-up:

• Define chip-level DFT architecture and strategy.
• Implement DFT schemes: scan, boundary scan, memory BIST, and logic BIST.
• Verify DFT logic and test patterns using simulation.
• Perform static timing analysis for test modes.
• Support ATE bring-up and debug of DFT patterns on test equipment.

Requirements

Must-have technical skills and experience:

• Proven experience implementing and verifying DFT schemes at chip level.
• Experience with test-pattern generation and simulation workflows.
• Experience with static timing analysis for test configurations.
• Hands-on experience debugging test patterns during ATE bring-up.
• Strong problem-solving and collaboration skills across design and test teams.

Education Requirements

Bachelor's degree in Electrical, Electronic, or Computer Engineering with 16+ years of relevant industry experience, or Master's degree in Electrical, Electronic, or Computer Engineering with 14+ years of relevant industry experience.

About the Company

Company: Broadcom

Headquarters: Irvine, California, United States

Broadcom is a global technology leader that designs, develops, and supplies a wide range of semiconductor and infrastructure software solutions. The company is known for its innovations in wireless and broadband communications, enabling a connected world.