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Principal Design Verification Engineer

Marvell Technology
July 25, 2026
Full-time
On-site
Bengaluru, Karnataka, India
Verification Jobs, Level - Senior

Job Title

Principal Design Verification Engineer

Role Summary

Lead verification of CPU subsystems and SoC IP within the Infrastructure Processor business unit. Deliver verification environments, testbenches, coverage plans, and closure criteria for complex SoC designs.

The role combines hands-on verification, methodology ownership, and mentoring of verification engineers to ensure designs meet functional and protocol requirements.

Experience Level

Senior — typically 12–17 years with a Bachelor's degree, or 5–10 years with a Master's/PhD.

Responsibilities

Key responsibilities include:

  • Lead design verification for complex CPU subsystems and SoC IP.
  • Develop and execute testbenches, test plans, and coverage plans; drive coverage closure.
  • Create verification environments and tests from scratch; apply constrained-random stimulus and functional coverage.
  • Mentor and guide design verification engineers and review verification work.
  • Own subsystem verification flows and methodologies; coordinate with design teams to debug and resolve issues.

Requirements

Must-have technical skills and experience:

  • Hands-on SoC verification experience, especially with processor and CPU subsystems (interrupt controllers, Arm CPU subsystems).
  • Proven ASIC verification experience covering environment development and test development.
  • Proficiency in SystemVerilog and UVM.
  • Experience with constrained-random verification and functional coverage-driven verification.
  • Strong debug skills and experience with tools such as Verdi and Incisive.
  • Knowledge of AMBA protocols (AXI, AHB, APB) and digital block/IP level verification.
  • Experience creating test benches, test plans, and coverage plans for complex projects.
  • Familiarity with GIT version control.

Nice-to-have:

  • Experience with multi-core CPU architectures, virtualization features, or domain-specific subsystems.
  • Prior experience owning verification methodologies at subsystem or SoC level.

Education Requirements

Bachelor's degree in Computer Science, Electrical Engineering, or a related field with ~12–17 years' relevant experience; or a Master's degree or PhD in Computer Science, Electrical Engineering, or related field with ~5–10 years' relevant experience. No specific certifications were listed. No explicit "equivalent experience" language provided.


About the Company

Company: Marvell Technology

Headquarters: Santa Clara, California, United States

Marvell’s semiconductor solutions serve as essential building blocks of the data infrastructure connecting our world, driving innovation across enterprise, cloud, AI, and carrier architectures. The company focuses on creating transformative technology that shapes the future.

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Date Posted: 2026-07-23