Principal Design Verification Engineer

Job Title

Principal Design Verification Engineer

Role Summary

Join Microsoft Silicon within Cloud Hardware and Infrastructure Engineering to lead verification of AI accelerators and related silicon. You will build verification environments and tests spanning IP, SoC, and system levels and work with architecture, design, firmware, validation, and product teams.

Hybrid role with a 3 days/week in-office expectation; cross-site collaboration and occasional travel (<25%).

Experience Level

Senior — experience expectations vary by degree: PhD +3 years, MS +6 years, BS +8 years, or equivalent practical experience. Typical candidates will have ~8+ years of relevant industry experience.

Responsibilities

Primary responsibilities include verification planning, environment and test development, and debugging across pre- and post-silicon stages.

• Create complex verification environments and tests for block, chip, and system levels; develop reference models and support post-silicon validation.
• Define verification strategy and write verification plans with architects and design engineers for IP/SS/SoC verification.
• Design and implement tests, testbenches, scoreboards, sequences, constraints, assertions, and functional coverage.
• Triage and debug simulation, emulation, and testbench failures; root-cause hardware/software interactions.
• Develop build scripts and Makefiles for scalable verification flows and automation.
• Apply Agile practices: code reviews, sprint planning, frequent deployments, and collaborative engineering processes.
• Collaborate across teams and geographies to drive verification closure and delivery.
• Develop and implement technical solutions to complex quality and design challenges.

Requirements

Must-have technical skills and compliance requirements; preferred skills listed separately.

• Must-have: Proven experience creating simulation environments and tests and performing pre-silicon functional verification across multiple IPs or systems.
• Must-have: Deep expertise in verification methodologies, testbench development, stimulus generation, coverage closure, and debug.
• Must-have: Hands-on experience with SystemVerilog/UVM and simulation/emulation flows; ability to develop verification components (scoreboards, assertions, coverage).
• Must-have: Proficiency in C/C++ and scripting languages (Python, Ruby, Perl) for test development and automation.
• Must-have: Experience developing scalable verification infrastructure and related build automation.
• Must-have: Ability to meet Microsoft security and export-control screening requirements and to provide documentation of citizenship or residency as required.
• Nice-to-have: Experience with CPU or graphics-core verification, hardware emulation/FPGAs, firmware (secure/non-secure boot), synthesizable RTL design, and broader software development.

Education Requirements

Required: Doctorate (PhD) in Electrical Engineering, Computer Engineering, Computer Science, or related field with 3+ years technical experience; OR Master’s in those fields with 6+ years; OR Bachelor’s in those fields with 8+ years; OR equivalent practical experience. Preferred mentions BS/MS in Electrical, Computer, or Software Engineering. (Source text requires degree-based experience equivalencies and allows equivalent experience.)

About the Company

Company: Microsoft

Headquarters: Redmond, Washington, United States

Microsoft is a global technology company that develops and sells software, services, devices, and solutions. Known for its Windows operating system, Office suite, and Azure cloud platform, Microsoft aims to empower individuals and organizations around the world to achieve more. The company fosters a culture of innovation and inclusion, focusing on delivering trusted experiences to customers and partners globally.