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Principal Design Engineer

Cadence Design Systems
September 09, 2026
Full-time
On-site
Austin, Texas, United States
RTL Design Jobs, Level - Senior

Job Title

Principal Design Engineer

Role Summary

Lead the design and integration of digital IP into SoCs, working with architecture, verification, and physical design teams to meet power, performance, and area targets. Provide technical leadership on lint/CDC, synthesis constraints, STA, and automation to improve design quality and turnaround.

Experience Level

Senior-level role. The posting expects approximately 12+ years of digital design experience.

Responsibilities

Key responsibilities include designing IP, ensuring quality, and supporting downstream implementation and verification.

  • Design and integrate digital IP blocks into SoC designs based on customer architecture specifications.
  • Perform Lint and CDC analysis, identify violations, and drive fixes.
  • Create synthesis constraints at IP and SoC level and run basic synthesis for PPA optimization.
  • Develop detailed microarchitectural specification documents.
  • Support verification: test-plan input, coverage analysis, and feature debugging.
  • Support physical design team during implementation and handoff.
  • Develop automation to eliminate repetitive tasks and improve flow efficiency.
  • Collaborate across teams to deliver project milestones.

Requirements

Must-have technical skills and experience; nice-to-have items indicated.

  • Strong knowledge of digital design fundamentals and Verilog/SystemVerilog.
  • Proven experience with Lint and CDC tools and ability to establish flows from scratch.
  • Experience creating synthesis constraints and performing Static Timing Analysis (STA); familiarity with synthesis tools is a plus.
  • Familiarity with simulation tools (for example, Xcelium or similar) to support verification.
  • Proficiency in scripting languages such as Python, Perl, or Tcl.
  • Ability to innovate and automate repetitive tasks and workflows.
  • Good communication skills for cross-functional collaboration.
  • Nice-to-have: experience with AMBA protocols/ARM IPs and high-speed interfaces (PCIe, Ethernet, DDR).

Education Requirements

B.E., B.Tech, or M.Tech degree is specified. The posting expects approximately 12+ years of experience as a digital design engineer.


About the Company

Company: Cadence Design Systems

Headquarters: San Jose, California, USA

Cadence Design Systems is a global electronic design automation company that provides software, hardware, and intellectual property for designing advanced semiconductor chips. With over 25 years in the industry, Cadence is known for its innovative technology solutions and has been recognized by Fortune Magazine as one of the 100 Best Companies to Work For. The company is dedicated to solving complex technical challenges in order to enable customers to create revolutionary products and experiences.

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Date Posted: 2026-09-08