Principal Design Engineer

Job Title

Principal Design Engineer

Role Summary

Experienced RF power amplifier (PA) design engineer for an advanced development team focusing on GaAs PA ICs and laminate/IPD matching networks for cellular and Wi‑Fi applications (700 MHz–7 GHz).

Responsible for feasibility studies, design, simulation, layout, bench tuning, data analysis, mentoring engineers, and communicating results to cross‑functional teams.

Experience Level

Senior — posting requires 8+ years of related experience with a Bachelor’s degree; M.S./Ph.D. and 15+ years preferred.

Responsibilities

Key responsibilities include:

• Conduct feasibility studies and define PA architectures to meet power, bandwidth, efficiency, and linearity targets.
• Design, simulate, and lay out GaAs HBT PA ICs and laminate/IPD matching networks using ADS and EM tools.
• Perform linear and nonlinear simulations and validate designs over PVT and VSWR conditions.
• Perform hands‑on bench tuning with network analyzers, probe stations, source/load‑pull systems, and modulated‑signal test equipment.
• Analyze measurement data, optimize designs for yield and margin, and document results.
• Mentor junior engineers and communicate results to cross‑functional teams and customers.
• Prepare technical reports, conference presentations, and invention disclosures as needed.

Requirements

Must-have:

• Proven experience designing cellular or Wi‑Fi PAs using GaAs HBT technology.
• Strong understanding of PA architectures and high‑efficiency/high‑linearity techniques, including load and supply modulation.
• Knowledge of GaAs HBT device physics across temperature, voltage/current, and frequency.
• Extensive experience with ADS and EM simulation tools (FEM, Momentum, HFSS).
• Solid background in RF/microwave engineering, electromagnetics, analog circuits, and wireless communications.
• Hands‑on experience with RF test equipment: network analyzers, probe stations, source/load‑pull systems, and modulated‑signal analyzers.
• Strong communication, teamwork, documentation, and data‑analysis skills; detail oriented and able to meet schedules.

Nice-to-have:

• Experience with RFIC/MMIC and analog blocks (PAs, switches, LNAs) in pHEMT, SiGe, SOI/CMOS technologies.
• Familiarity with PA linearization techniques.
• Experience with Cadence or AWR Microwave Office schematic capture, layout, and simulation tools.
• Proficiency with MATLAB, JMP, Spotfire, AEL, or similar data‑analysis/programming tools.
• Published technical authorship or conference presentations.

Education Requirements

Minimum: Bachelor’s degree plus 8+ years of related work experience, or a post‑graduate degree. Preferred: M.S. or Ph.D. with 15+ years of experience. Degrees in engineering or related technical fields are typical.

About the Company

Company: Qorvo

Headquarters: Greensboro, NC, US

Qorvo supplies innovative semiconductor solutions that enhance connectivity and power for a variety of applications, including consumer electronics, automotive, and healthcare. With a focus on RF and power solutions, Qorvo combines technology leadership and global manufacturing to address complex challenges in fast-growing industries. Their commitment to excellence and innovation drives them to shape the future of wireless communications.