Principal Board & Package Co-design Architect

Job Title

Principal Board & Package Co-design Architect

Role Summary

Lead system-level board and silicon-package co-design for Arm's hardware development platforms. Work with SoC teams, packaging engineers and platform leads to define technical requirements, assess trade-offs, and deliver practical PCB and package integration solutions for high-performance embedded compute platforms.

Experience Level

Senior (Principal-level). No specific years-of-experience stated.

Responsibilities

Provide architecture, guidance and hands-on analysis for PCB and package integration across prototype and production platforms.

• Specify, evaluate and develop PCB and package integration approaches with cross-functional engineering teams.
• Drive PCB development activities: breakout strategy, routing approaches, design rules and layer-count optimization.
• Translate SoC and technology requirements into platform-level architectures and constraints.
• Assess routability, escape routing, and provide IO count estimates for given stack-ups and rule-sets.
• Perform signal and power integrity trade-off analysis from board and packaging perspectives.
• Evaluate package pinout options for routability, SI/PI, manufacturability, layer count and cost.
• Define or review PCB layout guidelines, PDN strategy, component placement and form-factor constraints.
• Collaborate with PCB fabricators, CEMs and chip packaging teams to ensure manufacturable solutions.
• Provide timescale estimates and technical justification to program and product teams.

Requirements

Core technical and collaborative skills required to influence and deliver board-package co-design.

• Must-have:
  • Proven expertise in PCB and silicon package co-design and system-level hardware architecture for embedded/compute platforms.
  • Experience with high-speed IO standards (for example PCIe Gen5/6/7, LPDDR5/6, CSI, DSI) and embedded storage/compute peripherals.
  • Practical experience in complex board design involving LSI devices, FPGAs, embedded firmware components and PMICs.
  • Knowledge of IC packaging technologies and their impact on PCB design, routability and power delivery.
  • Experience collaborating with chip packaging teams and influencing SoC pin-outs for routing and cost optimization.
  • Expertise in escape routing analysis and estimating routable IO counts for given stack-ups and design rules.
  • Extensive signal integrity and power integrity analysis experience from board and packaging viewpoints.
  • Understanding of PCB fabrication processes (PTH, HDI), stackup/VIA topologies and substrate materials for manufacturability assessments.
  • Proficiency with EDA tools for schematic entry and PCB layout (Cadence OrCAD & Allegro).
  • Strong communication skills and ability to operate effectively in a fast-paced, ambiguous environment.
• Nice-to-have:
  • Experience with SI tools (ANSYS, Siemens EDA, or equivalent).
  • Prior experience in the semiconductor industry and familiarity with SoC development lifecycles.
  • Fundamental understanding of compute architectures and system functional blocks.
  • Experience working across geographies with distributed teams.

Education Requirements

Not specified.

About the Company

Company: Arm

Headquarters: Cambridge, United Kingdom

ARM is a global leader in semiconductor and software design, driving innovation in computing technology. The company specializes in designing processors and systems that provide the essential building blocks for electronic devices. ARM's architecture is widely used in smartphones, servers, and IoT devices, and its collaborative culture fosters bold thinking, diversity, and high-impact benefits for its talented workforce.