Principal ASIC Verification Engineer

Job Title

Principal ASIC Verification Engineer

Role Summary

Join a networking silicon team developing high-speed ASICs for routers and switches. The role leads verification efforts for blocks, subsystems, and SoC-level features to ensure functional correctness from specification to netlist.

This position is hybrid with an expectation of approximately 2 days per week in the Sunnyvale, CA office.

Experience Level

Senior — requires 15+ years of ASIC/SoC verification experience as stated in the posting.

Responsibilities

Accountable for verification planning, environment development, execution, and closure for complex ASIC/SoC designs.

• Own block/subsystem verification: create test plans, execute tests, and drive coverage closure.
• Develop and maintain UVM-based verification environments (agents, sequences, scoreboards, register models, virtual sequences).
• Perform constraint-driven random testing and develop functional coverage and assertion strategies (SVA).
• Run and analyze simulations with industry tools and debug waveforms to validate design functionality.
• Collaborate with cross-functional teams to identify and resolve design and verification issues.
• Contribute to verification infrastructure: coverage analytics, regression flows, and CI integration.

Requirements

Core technical requirements and practical experience needed to perform the role.

Must-have:

• 15+ years of ASIC/SoC verification experience owning verification from test plan to coverage closure.
• Expertise in SystemVerilog and UVM; experience developing environments from scratch.
• Deep knowledge of randomization, constraints, functional coverage, and SVA assertions.
• Strong test planning, coverage analysis, and complex SoC debug skills.
• Proficiency with industry simulators (examples: Cadence Xcelium, Synopsys VCS, Mentor Questa) and waveform debugging.

Nice-to-have:

• Experience verifying networking ASIC datapath or control blocks (packet processing, forwarding engines, fabric interfaces).
• Familiarity with high-speed interconnects, buffers, scheduling pipelines, emulation, or hardware acceleration.
• Experience with post-silicon bring-up and debug, UPF low-power flow, formal verification, and CI tools (e.g., Jenkins).

Education Requirements

Not specified.

About the Company

Company: Hewlett Packard Enterprise

Headquarters: Spring, TX, United States

Global enterprise technology company delivering hybrid cloud, edge-to-cloud platforms, servers, storage, networking, and IT services to help organizations build, run, and secure applications and infrastructure at scale.