Principal ASIC Physical Design Engineer

Job Title

Principal ASIC Physical Design Engineer

Role Summary

Lead the physical implementation of Positron AI's inference accelerators, owning floorplanning through tapeout to meet performance, power, and area targets. Collaborate with backend teams to define implementation strategies, develop methodologies, and apply AI-enabled techniques for QoR and congestion prediction.

Experience Level

Senior — requires 12+ years of physical design experience, including multiple advanced-node tapeouts.

Responsibilities

Primary responsibilities include end-to-end physical implementation, signoff, and methodology development:

• Own physical implementation from floorplan to tapeout; lead implementation reviews and execution.
• Drive clock tree synthesis, place-and-route, routing optimization, and timing closure.
• Manage signal integrity, IR/EM closure, ECO implementation, and metal fill for signoff-quality results.
• Oversee tapeout signoff and drive closure across timing, power, area, congestion, DRC/LVS, EM/IR, and yield.
• Define partitioning and hierarchical implementation strategies for complex designs.
• Develop power-grid methodologies, power/ground tiling, and bump planning.
• Create congestion analysis and wire-estimation approaches to inform early floorplan decisions.
• Manage Innovus-based implementation flows end to end and coordinate with backend design services.
• Apply AI-enabled techniques for automated QoR analysis, congestion and routing prediction, and floorplan optimization.

Requirements

Must-have technical skills and experience, plus preferred expertise.

• 12+ years of physical design experience, with multiple advanced-node tapeouts.
• Expert-level proficiency in Innovus and ICC2 implementation flows; hands-on delivery of signoff across timing and power.
• Deep expertise in floorplanning, clock tree synthesis, timing and power closure, ECO implementation, and routing optimization.
• Proven ability to drive closure across timing, power, area, congestion, DRC/LVS, EM/IR, and yield metrics.

• Experience with AI accelerator design and large SRAM arrays.
• Familiarity with SerDes, LPDDR interfaces, chiplet architectures, and 2.5D packaging.
• Experience with Tempus, PrimeTime, Voltus, RedHawk, Calibre, and other physical verification and timing tools.

Education Requirements

Not specified.

About the Company

Company: Positron AI

Positron AI designs custom hardware systems and SoC solutions to accelerate AI inference, focusing on high-performance, energy-efficient alternatives to traditional GPU-based inference platforms.