Principal ASIC Design Engineer

Job Title

Principal ASIC Design Engineer

Role Summary

Design and deliver complex RTL modules and subsystems for high-performance networking ASICs. Provide technical leadership across specification, implementation, verification coordination, and timing/power closure within a multi-disciplinary ASIC development team.

Experience Level

Senior — the role targets an experienced engineer (the posting indicates 15+ years of relevant experience).

Responsibilities

Accountable for architecture, RTL implementation, and delivery of high-performance subsystems.

• Architect modules and subsystems for networking chips to meet power/area/performance targets.
• Write functional and micro-architecture specifications for assigned modules.
• Implement RTL using Verilog/SystemVerilog and drive to final netlist.
• Develop functional coverage and SystemVerilog Assertions to catch corner cases in verification.
• Apply power-reduction techniques during architecture and implementation to meet power targets.
• Collaborate with physical design for timing closure and fix RTL timing issues to meet frequency goals.
• Work closely with verification teams to ensure block-level validation.
• Provide technical leadership and mentor junior engineers and interns.

Requirements

Key technical skills and attributes required or strongly desired.

• Must-have: Strong RTL coding experience in Verilog/SystemVerilog and proven delivery of high-performance subsystems from specification to implementation.
• Must-have: Experience developing functional coverage and assertions to support block verification.
• Must-have: Strong analytical and problem-solving skills; effective written and verbal communication.
• Must-have: Experience collaborating with physical design for timing closure and applying RTL fixes for timing.
• Nice-to-have: Knowledge of synthesis, lint, and other ASIC tool flows.
• Nice-to-have: Familiarity with power reduction techniques and design-for-power strategies.
• Nice-to-have: Experience with Perl or Python for scripting and automation.
• Nice-to-have: Background in computer architecture or networking protocols.

Education Requirements

Bachelor's degree in Electrical Engineering required; Master's degree strongly desired. (No other degrees, fields, certifications, or explicit equivalent-experience language stated.)

About the Company

Company: Hewlett Packard Enterprise

Headquarters: Spring, TX, United States

Global enterprise technology company delivering hybrid cloud, edge-to-cloud platforms, servers, storage, networking, and IT services to help organizations build, run, and secure applications and infrastructure at scale.