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Principal Applications Engineer, Prime Power RTL 2.0

Synopsys
September 16, 2026
Full-time
On-site
Sunnyvale, California, United States
$184,000 - $276,000 USD yearly
EDA Jobs, Level - Senior

Job Title

Principal Applications Engineer, Prime Power RTL 2.0

Role Summary

Technical authority for RTL-stage power analysis in Synopsys' low-power toolset. The role leads complex customer engagements, develops advanced RTL power methodologies, and coordinates cross-functional teams to drive adoption and successful deployment of Prime Power RTL and related flows.

Experience Level

Senior-level. Typically 10+ years of relevant experience (or 8+ years with an advanced degree); operates with minimal oversight and leads multi-product, high-impact engagements.

Responsibilities

The principal responsibilities focus on customer-facing technical leadership, methodology architecture, and cross-tool integration.

  • Act as primary technical advisor for Tier-1 and strategic accounts on RTL power budgeting, architecture exploration, and pre-implementation signoff.
  • Design and architect end-to-end RTL power methodologies including logical and physical analysis, glitch and RTLA strategies, WCDF calibration, and multi-rail UPF analysis.
  • Lead complex evaluations demonstrating correlation between PPRTL and signoff metrics (PrimeTime PX, ZeBu Empower); define calibration and validation strategies.
  • Resolve cross-tool escalations and technical issues across PPRTL, VCS, Verdi, PrimeTime, RTL Architect, Fusion Compiler, and emulation flows.
  • Coach and mentor staff-level AEs, deliver advanced training, and provide structured R&D and competitive feedback.
  • Partner with Sales and Marketing to drive benchmarks, license expansion, and strategic wins.

Requirements

Must-have technical skills and experience. Preferred items are listed separately.

  • Extensive hands-on experience with Prime Power RTL and RTL-stage power analysis tools and flows.
  • Deep knowledge of RTL power domains: CGE/CGR/DACGE, glitch behavior, memory and multi-rail UPF interactions.
  • Strong experience with VCS, Verdi, SDF, UPF, and Tcl-based flow development and automation.
  • Proven record leading complex customer engagements and delivering measurable business impact.
  • Excellent troubleshooting and cross-tool escalation skills across simulation, RTL analysis, and signoff correlation.

Preferred:

  • Experience with PrimeTime PX correlation, RTL Architect, Fusion Compiler, NDM import flows, and ZeBu emulation-based power analysis.
  • Familiarity with VC SpyGlass/VC LP low-power verification and IEEE 1801 UPF expertise.
  • Publications or presentations (DAC, SNUG) and experience with AI, mobile, or datacenter SoC RTL power use cases.

Education Requirements

Bachelor's degree in Electrical Engineering, Computer Engineering, or related field is expected; MS or PhD preferred. Equivalent practical experience may substitute for degree requirements (the posting specifies BS + 10 years, or MS + 8 years of related experience).


About the Company

Company: Synopsys

Headquarters: Mountain View, California, USA

Synopsys is a leading company in electronic design automation (EDA) and semiconductor IP solutions. It provides tools and services for designing and verifying complex semiconductor devices and systems. The company plays a pivotal role in the semiconductor industry, helping engineers innovate and deliver higher-quality products faster. Synopsys is committed to advancing technology standards and offers a range of software and hardware solutions to its clients globally.

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Date Posted: 2026-09-13