Principal Applications Engineer — High-Speed Interface Protocols

Job Title

Principal Applications Engineer — High-Speed Interface Protocols

Role Summary

Customer-facing principal applications engineer responsible for architecting and demonstrating Cadence SerDes IP solutions for high-speed interfaces (PCIe, CXL, Ethernet, USB, etc.).

Work with field sales, marketing, and R&D to win opportunities, provide technical presales and support, and define internal processes to improve team productivity and grow the IP business.

Experience Level

Senior-level. Typical background: MS in EE/CE + ~10+ years relevant experience or BS in EE/CE + ~15+ years, or equivalent practical experience in high-speed interface IP.

Responsibilities

Key responsibilities include:

• Lead technical presales and configuration of high-speed interface IP (PCIe, CXL, Ethernet PHY/controllers).
• Present Cadence IP portfolio and technical capabilities to prospective customers and at industry events.
• Act as product expert for digital controller and PHY IPs and related protocols.
• Collaborate with IP sales, marketing, and R&D to define solutions and win opportunities.
• Demonstrate IP performance via lab demos and customer evaluations.
• Provide quick-turn, product-specific technical support to customers, architects, designers, and field teams.
• Author application notes and technical articles for internal and external audiences.
• Occasional travel to customer sites as required.

Requirements

Must-have:

• Deep knowledge of one or more high-speed interface protocols: PCIe, CXL, UCIe, Ethernet, USB, MIPI, 224G/112G.
• Strong technical expertise in PHY and/or controller design, validation, or integration for high-speed interfaces.
• Proven experience in customer-facing presales, account support, or technical field roles.
• Excellent presentation, verbal, and written communication skills.
• Individual leadership and initiative to manage pre-sales accounts and coordinate across teams.

Nice-to-have:

• Lab validation and demo setup skills.
• Experience with controller and/or PHY verification.
• Familiarity with AXI and PIPE interface protocols.

Education Requirements

BS in Electrical Engineering (EE), Computer Engineering (CE) or related technical field with 15+ years relevant experience, or MS in EE/CE or equivalent with 10+ years relevant experience; equivalent practical experience is acceptable. No specific certifications required.

About the Company

Company: Cadence Design Systems

Headquarters: San Jose, California, USA

Cadence Design Systems is a global electronic design automation company that provides software, hardware, and intellectual property for designing advanced semiconductor chips. With over 25 years in the industry, Cadence is known for its innovative technology solutions and has been recognized by Fortune Magazine as one of the 100 Best Companies to Work For. The company is dedicated to solving complex technical challenges in order to enable customers to create revolutionary products and experiences.