Job Title
Principal Application Engineer
Role Summary
Provide technical support and guidance to customers on backend digital design implementation and signoff, including place-and-route, timing and power closure. Act as the technical lead for customer engagements, drive evaluations and adoption of Cadence tools, and collaborate with R&D to improve flows and methodologies.
Experience Level
Senior β requires 8+ years of design/EDA experience.
Responsibilities
Primary responsibilities include supporting customer designs, running technical evaluations, and improving tool flows.
- Provide technical support for backend digital design implementation and signoff (place-and-route, timing/power closure).
- Guide customers on using Cadence technologies to meet design goals and schedules.
- Conduct technical presentations, product demonstrations, and training.
- Plan and drive technical evaluations and benchmarks to completion.
- Work closely with R&D to report issues and drive tool and methodology enhancements.
- Customize and augment flows using Tcl, Python, or other scripting to meet objectives and improve results.
- Capture and share best practices and lessons learned to improve efficiency of future engagements.
Requirements
Must-have skills and experience are listed first; preferred skills follow.
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Must-have: 8+ years of design/EDA experience focused on digital backend implementation and signoff.
- Strong knowledge of digital design fundamentals, semiconductor fundamentals, and static timing analysis (STA).
- Experience with IC digital implementation flows and backend EDA tools (place-and-route, IR drop analysis, timing and power closure).
- Experience with advanced process nodes (10nm and below).
- Proficient in scripting languages (Tcl, Perl, Python) to modify and automate flows.
- Strong customer-facing communication, troubleshooting, and problem-solving skills.
- Demonstrated drive for continuous learning and professional skill expansion; strong verbal and written communication.
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Nice-to-have: experience with frontend EDA tools (synthesis, DFT, logical equivalence checking), familiarity with Cadence toolset (Genus, Innovus, Conformal, Tempus, Modus, Voltus), and experience with cutting-edge nodes (5nm and below).
Education Requirements
Minimum: Bachelor's degree in Computer Science, Computer Engineering, Electrical Engineering, or a related field. Preferred: Master's degree in the same or a related field. (Degrees are explicitly stated in the source.)
About the Company
Company: Cadence Design Systems
Headquarters: San Jose, California, USA
Cadence Design Systems is a global electronic design automation company that provides software, hardware, and intellectual property for designing advanced semiconductor chips. With over 25 years in the industry, Cadence is known for its innovative technology solutions and has been recognized by Fortune Magazine as one of the 100 Best Companies to Work For. The company is dedicated to solving complex technical challenges in order to enable customers to create revolutionary products and experiences.

Date Posted: 2026-05-29