Principal Application Engineer

Job Title

Principal Application Engineer

Role Summary

Lead functional and performance validation for HDD SoC devices, focusing on power analysis, electrical characterization across PVT corners, silicon bring-up, and mixed-signal IP characterization. Work closely with design, architecture, validation, FAEs, and customers to reproduce, debug, and resolve silicon and subsystem issues, and to produce test plans, automation, and technical guidance.

This role is based in Santa Clara and may require eligibility to access export-controlled information; non-U.S. citizens may be subject to export license review.

Experience Level

Senior-level. Typical candidates have 5+ years of relevant industry experience with significant hands-on post-silicon validation, hardware test, or silicon bring-up and experience supporting global customers.

Responsibilities

Primary responsibilities include:

• Lead functional and performance validation and power/electrical characterization of HDD SoCs across process, voltage, and temperature corners.
• Develop test plans, drive test automation, and author detailed test reports to support silicon bring-up and product qualification.
• Reproduce, debug, and resolve issues with design, architecture, and validation teams; support board-level debug and firmware interaction.
• Engage with global customers on technical escalations; provide root-cause analysis and resolutions for HDD SoC and mixed-signal subsystem issues.
• Characterize and model mixed-signal IP blocks (read/write channels, PLLs, ADCs, analog front-end) and contribute to signal integrity analysis.
• Serve as a technical resource for FAEs, Test Engineers, and Documentation; document findings and best practices to grow team knowledge.

Requirements

Must-have:

• 5+ years of relevant industry experience; 4+ years of hands-on experience in product development, post-silicon application engineering, hardware test engineering, or silicon bring-up and debug on mixed-signal ASICs.
• 1+ years of experience providing global technical customer support and handling technical escalations.
• Proficiency in C, Python, and MATLAB for test automation, signal processing, and data analysis.
• Strong understanding of high-speed communication channels (HDD read channel architectures preferred; SerDes/PCIe PHY experience considered).
• In-depth knowledge of analog and digital circuit design principles, signals and systems, and control theory.
• Practical experience with R&D lab equipment: digital sampling oscilloscopes, signal generators, spectrum and network analyzers.
• Proven track record diagnosing and resolving complex hardware and silicon-level issues; strong verbal and written technical communication skills.

Nice-to-have:

• Familiarity with HDD storage technologies, mechanical/magnetic recording principles, servo control, and channel signal processing.
• Background in communications theory, DSP, or statistical signal analysis.
• Experience scripting in TCL, Perl, or Shell for lab automation and regression testing.
• Experience with version control systems (Git) and collaborative engineering workflows.

Education Requirements

M.S. in Electrical Engineering (or equivalent) is stated in the posting; equivalent practical experience is accepted. Fields referenced include Electrical Engineering and related technical disciplines.

Compensation note: Expected base pay range (USD): 131,010 - 196,300 per annum (posted by employer).

Reasonable accommodation: Applicants who require a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at TAOps@marvell.com.

About the Company

Company: Marvell Technology

Headquarters: Santa Clara, California, United States

Marvell’s semiconductor solutions serve as essential building blocks of the data infrastructure connecting our world, driving innovation across enterprise, cloud, AI, and carrier architectures. The company focuses on creating transformative technology that shapes the future.