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Principal Analog Mixed-Signal Design Engineer - Optical

Marvell Technology
November 5, 2026
Full-time
On-site
Ottawa, Ontario, Canada
$164,000 - $218,700 CAD yearly
Device Engineering Jobs, Level - Senior

Job Title

Principal Analog Mixed-Signal Design Engineer - Optical

Role Summary

Principal-level analog/RF design engineer responsible for architecture, transistor-level design and validation of high-speed optical receiver front-ends (TIAs) and related broadband analog circuits. The role is on the Broadband Analog team focusing on SiGe BiCMOS and advanced CMOS FinFET implementations for data center, metro and long-haul optical applications.

Primary mission: deliver leading-performance analog/RF IP and drive designs through tape-out, lab validation and transition to production.

Experience Level

Senior (Principal). Experience guidance: Master's or PhD holders typically 7+ years; Bachelor’s degree holders typically 10+ years of relevant industry experience.

Responsibilities

The role combines circuit design, layout-aware implementation, measurement correlation and cross-functional production handoff.

  • Design active circuits for high-speed optical receivers, including transimpedance amplifiers (TIAs) and broadband drivers.
  • Develop transmission-line and millimeter-wave structures to extend bandwidth and performance.
  • Design broadband analog blocks (equalizers, AGC loops, linear regulators, current/voltage sensors, bandgaps, DAC/ADC interfaces).
  • Perform analog custom layout and ensure layout-driven performance targets.
  • Plan and execute post-silicon lab validation, correlate measurements to simulations, and debug silicon issues.
  • Collaborate with functional teams for qualification, mass-production transition and customer support.

Requirements

Must-have technical skills and experience for immediate contribution.

  • Proven track record in high-performance receiver design with successful chip tape-out and lab evaluation.
  • Experience using EDA CAD tools for schematic, simulation and layout verification.
  • Analog custom layout experience and layout-for-performance awareness.
  • Experience measuring IC performance and debugging to correlate simulation and silicon results.
  • Deep understanding of transistor-level design, device physics and control/feedback loop stability analysis.
  • Strong written and verbal communication, presentation and documentation skills.
  • Nice-to-have: experience with automatic gain-control loops, high-precision analog blocks (regulators, current sensors, bandgaps), continuous-time equalizers, package-system integration, and working with SiGe BiCMOS and FinFET technologies.
  • Nice-to-have: experience leading chips to mass production, chip-lead responsibilities, and mentoring junior designers.

Education Requirements

Bachelor's degree in Electrical Engineering with 10+ years industry experience, OR Master's or PhD degree in Electrical Engineering with 7+ years industry experience. (Degree and years specified in the source.)


About the Company

Company: Marvell Technology

Headquarters: Santa Clara, California, United States

Marvell’s semiconductor solutions serve as essential building blocks of the data infrastructure connecting our world, driving innovation across enterprise, cloud, AI, and carrier architectures. The company focuses on creating transformative technology that shapes the future.

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Date Posted: 2026-11-02