Principal Analog Mixed-Signal Design Engineer

Job Title

Principal Analog Mixed-Signal Design Engineer

Role Summary

Member of the Optical / Broadband Analog team responsible for design and validation of high-speed optical front-end ICs (TIAs, drivers) used in data-center and telecom applications. The role combines hands-on circuit design with technical leadership of multi-disciplinary teams through tape-out, lab validation, and production transition.

Experience Level

Senior — candidate should have extensive industry experience in RF/analog receiver and high-speed TIA design. Typical experience expectation is roughly 10–15 years in relevant IC design; exceptional candidates with deep relevant experience may be considered with fewer years.

Responsibilities

Primary responsibilities include technical design work and leadership across the analog front end and production lifecycle.

• Design and validate high-speed transimpedance amplifiers (TIAs) and broadband analog circuits for optical receivers.
• Develop transmission-line and millimeter-wave structures to meet high-frequency performance goals.
• Design related analog blocks: linear regulators, AGC loops, current/voltage sensors, bandgaps, DAC interfaces.
• Create microarchitecture for major circuit blocks and guide/mentor a team of designers through implementation.
• Perform post-silicon validation, qualification, and support transition to mass production and customer support.
• Collaborate with process, package, test, and system teams to resolve integration issues.

Requirements

Key must-have technical skills and experience; nice-to-have items listed separately.

• Must-have: Proven industry experience in IC design with completed chip tape-outs and hands-on lab evaluation of receiver designs.
• Must-have: Strong proficiency with EDA/CAD tools and analog custom layout.
• Must-have: Demonstrated ability to measure IC performance, debug silicon, and correlate measurements to simulations.
• Must-have: Deep transistor-level design skills, device physics understanding, and control/feedback loop stability analysis.
• Nice-to-have: Experience with CTLE design, AGC loops, high-precision analog blocks (linear regulators, sensors, bandgaps, DACs).
• Nice-to-have: Experience with SiGe BiCMOS and other processes, package/system integration, taking chips to mass production, and serving as chip lead.
• Interpersonal: Team-player with strong communication, documentation, and leadership/mentoring experience.

Education Requirements

Bachelor's, Master's, or PhD in Electrical Engineering (or equivalent) were listed in the source as preferred. The posting specifies backgrounds in Electrical Engineering with focus on RF/analog receiver/TIA design; equivalent practical industry experience is acceptable.

About the Company

Company: DensityAI

Headquarters: Mountain View, CA, United States

DensityAI is a semiconductor company focused on developing advanced silicon and multi-die packaged chips, with expertise in design-for-test, verification, and production test for high-performance and AI applications.