Principal Analog/Mixed Signal CAD Engineer

Job Title

Principal Analog/Mixed Signal CAD Engineer

Role Summary

Lead the development and support of parasitic extraction and analog/mixed-signal (AMS) CAD flows for advanced process technologies, including FinFET, BiCMOS, SiGe, and silicon photonics. Work with design teams, foundries, and EDA vendors to architect, validate, and maintain automated AMS design and verification flows.

Experience Level

Senior. Typical background: 10–15 years with a BSEE, or 5–10 years with an MS/PhD in Electrical Engineering (see Education Requirements for full details).

Responsibilities

Primary responsibilities include building, validating, and supporting automated AMS design flows and related tools.

• Architect and maintain next-generation automated AMS flows used across Marvell design teams.
• Develop and maintain custom tools, PCells/Pycells, GUI utilities, and automation scripts within Cadence Virtuoso, Synopsys, and Calibre environments.
• Implement and validate parasitic extraction and post-layout verification flows (extraction setup, validation, debugging, EM/IR verification).
• Install, validate, and support foundry PDKs and physical verification flows.
• Partner with analog designers, foundries, and EDA vendors to troubleshoot complex flow and tool issues.
• Contribute to company-wide CAD infrastructure, best practices, and process improvements for AMS and silicon photonics designs.

Requirements

Must-have technical skills and domain experience.

• Proven experience building and maintaining analog/mixed-signal design flows for advanced technologies (FinFET, BiCMOS, SiGe, SiPho).
• Hands-on experience with parasitic extraction tools and flows (Cadence Quantus and/or Synopsys StarRC preferred).
• Strong practical experience with Cadence Virtuoso and industry EDA (Synopsys OptoCompiler, Siemens Calibre) for AMS design and verification.
• Programming and scripting skills: Python, TCL, Shell, and SKILL for CAD automation and tool integration.
• Experience developing CAD automation or verification frameworks and custom productivity tools.
• Strong debugging skills and ability to validate and debug extraction and post-layout flows.
• Excellent communication and cross-functional collaboration skills.
• Nice-to-have: deeper familiarity with silicon photonics design flows and related toolchains.

Education Requirements

Required: BSEE with 10–15 years of professional experience, or MS/PhD in Electrical Engineering with 5–10 years of industry experience (as stated by the employer).

About the Company

Company: Marvell Technology

Headquarters: Santa Clara, California, United States

Marvell’s semiconductor solutions serve as essential building blocks of the data infrastructure connecting our world, driving innovation across enterprise, cloud, AI, and carrier architectures. The company focuses on creating transformative technology that shapes the future.