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Principal Analog Design Engineer

Renesas
June 10, 2026
Full-time
On-site
Chandler, Arizona, United States
ASIC Design Jobs, Level - Senior

Job Title

Principal Analog Design Engineer

Role Summary

Lead architectural design and delivery of PMIC and mixed-signal products across the full development lifecycle, from customer requirements and specification through silicon verification and production readiness. Act as a global technical authority, mentor engineers, and drive company-wide engineering improvements.

This is a senior technical leadership role focused on power-management ICs, cross-functional collaboration, and strategic roadmap input.

Experience Level

Senior-level engineer. The posting specifies a minimum of approximately 12–15 years of experience in power management and related IC design, with recent experience as a technical project lead.

Responsibilities

Accountable for architecture, delivery, and verification of major analog/mixed-signal blocks and PMIC products. Key responsibilities include:

  • Lead full development lifecycle of analog and mixed-signal blocks and top-level PMIC products from specification through design, simulation, and silicon verification.
  • Serve as a global technical authority and primary point of contact; provide architectural recommendations and mentor engineering teams.
  • Collaborate with customers to define system requirements and trade-offs for performance, area, and power.
  • Plan high-level verification, DFT strategy, and coordinate lab evaluation with applications and test engineering to ensure production readiness.
  • Identify and implement company-wide improvements in engineering methodologies, policies, and strategic initiatives.
  • Contribute to product roadmap planning and align technical direction with market trends and CMOS process evolution.

Requirements

Must-have technical skills, leadership experience, and working style.

  • 12+ years experience in power management IC design with recent (within ~4 years) experience as a technical project lead on complex ICs.
  • Deep knowledge of CMOS power management circuits and practical experience across design and silicon bring-up.
  • Proven ability to drive engineering initiatives and process improvements while meeting tight schedules.
  • Strong communication and presentation skills for conveying complex technical concepts to multicultural teams and customers.
  • Ability to work independently as a technical lead and to mentor and develop other engineers; high cross-cultural sensitivity.
  • Willingness and ability to undertake occasional international travel at short notice.

Nice-to-have:

  • Experience with verification planning, DFT strategies, lab evaluation, and test engineering coordination.
  • Familiarity with roadmap planning and adapting designs to evolving CMOS process technologies.

Education Requirements

Degree-level qualification in Electronics Engineering or a related discipline (e.g., Bachelor's or Master's) is stated. The posting implies formal engineering education; equivalent practical experience may be considered.


About the Company

Company: Renesas

Headquarters: Hitachinaka, Japan

Renesas is a global leader in embedded semiconductor solutions, providing high-quality products across automotive, industrial, infrastructure, and IoT sectors. With over 22,000 employees in more than 30 countries, the company focuses on scalable solutions that enhance user experience and drive innovation while committed to sustainability and energy efficiency.

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Date Posted: 2026-05-18